AM79C976KI AMD (ADVANCED MICRO DEVICES), AM79C976KI Datasheet - Page 34

• Manufacturer Part Number: AM79C976KI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C976KI

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / RoHS Status: Not Compliant

DETAILED FUNCTIONS
Slave Bus Interface Unit
The slave bus interface unit (BIU) controls all accesses
to the PCI configuration space, the Control and Status
Registers (CSR), the Bus Configuration Registers
(BCR), the Address PROM (APROM) locations, and
the Expansion ROM. Table 2 shows the response of
the Am79C976 controller to each of the PCI commands
in slave mode.
Slave Configuration Transfers
The host can access the Am79C976 PCI configuration
space with a configuration read or write command. The
Am79C976 controller will assert DEVSEL during the
34
C[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Special Cycle
Reserved
Reserved
Reserved
Reserved
Command
Interrupt
Acknowledge
I/O Read
I/O Write
Memory Read
Memory Write
Configuration
Read
Configuration
Write
Memory Read
Multiple
Dual Address
Cycle
Memory Read
Line
Memory Write
Invalidate
Table 2. Slave Commands
Use
Not used
Not used
Read of CSR, BCR, APROM,
and Reset registers
Write to CSR, BCR, and
APROM
Memory mapped I/O read of
CSR, BCR, APROM, Reset
registers, and read of the
Expansion Bus
Memory mapped I/O write of
CSR, BCR, and APROM
Read of the Configuration
Space
Write to the Configuration
Space
Aliased to Memory Read
Not used
Aliased to Memory Read
Aliased to Memory Write
P R E L I M I N A R Y
Am79C976
address phase when IDSEL is asserted, AD[1:0] are
both 0, and the access is a configuration cycle. AD[7:2]
select the DWord location in the configuration space.
The Am79C976 controller requires AD[10:8] to be 0,
because it is a single function device. AD[31:11] are
“don't care.”
The active bytes within a DWord are determined by the
byte enable signals. Eight-bit, 16-bit, and 32-bit trans-
fers are supported. DEVSEL is asserted two clock cy-
c l es a ft er t he h os t ha s as s e r te d F RA ME . A ll
c onf ig ur at io n c y cl e s a r e of fi xe d l en gth . Th e
Am79C976 controller will assert TRDY on the third or
fourth clock of the data phase.
The Am79C976 controller does not support burst trans-
fers for access to configuration space. When the host
keeps FRAME asserted for a second data phase, the
Am79C976 controller will disconnect the transfer.
When the host tries to access the PCI configuration
space while the automatic read of the EEPROM after
H_RESET (see section on RESET) is on-going, the
Am79C976 controller will terminate the access on the
PCI bus with a disconnect/retry response.
The Am79C976 controller supports fast back-to-back
transactions to different targets. This is indicated by the
Fast Back-To-Back Capable bit (PCI Status register,
bit 7), which is hardwired to 1. The Am79C976 control-
ler is capable of detecting a configuration cycle even
when its address phase immediately follows the data
phase of a transaction to a different target without any
idle state in-between. There will be no contention on
the DEVSEL, TRDY, and STOP signals, since the
Am79C976 controller asserts DEVSEL on the second
clock after FRAME is asserted (medium timing).
Slave I/O Transfers
After the Am79C976 controller is configured as an I/O
device by setting IOEN (for regular I/O mode) or
MEMEN (for memory mapped I/O mode) in the PCI
Command register, it starts monitoring the PCI bus for
access to its address space. If configured for regular
I/O mode, the Am79C976 controller will look for an ad-
dress that falls within its 32 bytes of I/O address space
(starting from the I/O base address). The Am79C976
controller asserts DEVSEL if it detects an address
match and the access is an I/O cycle. If configured for
memory mapped I/O mode, the Am79C976 controller
will look for an address that falls within its 4096 bytes
of memory address space (starting from the memory
mapped I/O base address). The Am79C976 controller
asserts DEVSEL if it detects an address match and the
Don’t care
AD31-
AD11
AD10 -
AD8
0
DWord
AD7-
index
AD2
AD1
0
9/14/00
AD0
0