AM79C976KI AMD (ADVANCED MICRO DEVICES), AM79C976KI Datasheet - Page 209

• Manufacturer Part Number: AM79C976KI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C976KI

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / RoHS Status: Not Compliant

3
2
1
0
BCR9: Full-Duplex Control
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16
15-3
2
9/14/00
RES
RCVE
SFBDE
COLE
Name
RES
RES
FDRPAD
affected by S_RESET or setting
the STOP bit.
read as zeros.
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network.
Read/Write accessible. RCVE is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
able. When this bit is set, a value
of 1 is passed to the LEDOUT bit
in this register when the RXD[3:0]
pins are presenting the least sig-
nificant nibble of valid frame data.
Read/Write accessible. RCVE is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network.
Read/Write accessible. COLE is
set to 1 by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
zeros and read as undefined.
zeros and read as undefined.
Disable. When FDRPAD is set to
1 and full-duplex mode is en-
abled, the Am79C976 controller
will only receive frames that meet
the minimum Ethernet frame
length of 64 bytes. Receive DMA
will not start until at least 64 bytes
Reserved location. Written and
Receive Status Enable. When
Start Frame/Byte Delimiter En-
Collision Status Enable. When
Reserved locations. Written as
Reserved locations. Written as
Full-Duplex Runt Packet Accept
Description
P R E L I M I N A R Y
Am79C976
1
0
BCR16: I/O Base Address Lower
Bit
31-16 RES
15-5
4-0
RES
FDEN
Name
IOBASEL
RES
or a complete frame have been
received. When FDRPAD is
cleared to 0, the Am79C976 con-
troller will accept any frame of 12
bytes or greater, and receive
DMA will start according to the
programming of the receive FIFO
watermark.
Read/Write accessible. FDRPAD
is set to 1 by H_RESET and is not
affected by S_RESET or by set-
ting the STOP bit.
zeros and read as undefined.
trols whether full-duplex opera-
tion is enabled. When FDEN is
cleared and the Auto-Negotiation
is disabled, full-duplex operation
is
Am79C976 controller will always
operate in the half-duplex mode.
When
Am79C976 controller will operate
in full-duplex mode when the MII
port is enabled. Do not set this
bit when Auto-Negotiation is
enabled.
Read/Write accessible. FDEN is
reset to 0 by H_RESET, and is
unaffected by S_RESET and the
STOP bit.
Read/Write
BASEL
S_RESET or STOP.
Reserved locations. Written as
Full-Duplex Enable. FDEN con-
Reserved locations. Written as
zeros and read as undefined.
Reserved
H_RESET, the value of these bits
will be undefined. The settings of
these bits will have no effect on
any Am79C976 controller func-
tion. It is only included for soft-
ware compatibility with other
PCnet family devices.
Reserved locations. Written as
zeros, read as undefined.
Description
not
FDEN
is
enabled
not
locations.
accessible.
is
affected
and
set,
After
209
the
the
IO-
by