AM79C976KI AMD (ADVANCED MICRO DEVICES), AM79C976KI Datasheet - Page 236

• Manufacturer Part Number: AM79C976KI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C976KI

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / RoHS Status: Not Compliant

236
Offset
4
4
4
4
4
4
4
4
4
4
Bit
30
29
28
27
26
25
24
23
22
21
FRAM
Name
OFLO
LAFM
ERR
CRC
ENP
PAM
STP
Error Summary. ERR is the OR of FRAM, OFLO, and CRC. ERR is set by the
Am79C976 controller and cleared by the host.
Framing error indicates that the incoming frame contains a non-integer multiple of
eight bits and there was an FCS error. If there was no FCS error on the incoming
frame, then FRAM will not be set even if there was a non-integer multiple of eight
bits in the frame. FRAM is not valid in internal loopback mode. FRAM is valid only
when ENP is set and OFLO is not. FRAM is set by the Am79C976 controller and
cleared by the host.
Overflow error indicates that the receiver has lost all or part of the incoming frame,
due to an inability to move data from the receive FIFO into a memory buffer before
the internal FIFO overflowed. OFLO is set by the Am79C976 controller and cleared
by the host.
CRC indicates that the receiver has detected a CRC (FCS) error on the incoming
frame. CRC is valid only when ENP is set and OFLO is not. CRC is set by the
Am79C976 controller and cleared by the host. CRC will also be set when Am79C976
controller receives an RX_ER indication from the external PHY through the MII.
Reserved.
Start of Packet indicates that this is the first buffer used by the Am79C976 controller
for this frame. If STP and ENP are both set to 1, the frame fits into a single buffer.
Otherwise, the frame is spread over more than one buffer. When LAPPEN (CSR3,
bit 5) is cleared to 0, STP is set by the Am79C976 controller and cleared by the host.
When LAPPEN is set to 1, STP must be set by the host.
End of Packet indicates that this is the last buffer used by the Am79C976 controller
for this frame. It is used for data chaining buffers. If both STP and ENP are set, the
frame fits into one buffer and there is no data chaining. ENP is set by the Am79C976
controller and cleared by the host.
Reserved.
Physical Address Match is set by the Am79C976 controller when it accepts the
received frame due to a match of the frame’s destination address with the content of
the physical address register. PAM is valid only when ENP is set. PAM is set by the
Am79C976 controller and cleared by the host.
This bit does not exist when the Am79C976 controller is programmed to use 16-bit
software structures for the descriptor ring entries (BCR20, bits 7-0, SWSTYLE is
cleared to 0).
Logical Address Filter Match is set by the Am79C976 controller when it accepts the
received frame based on the value in the logical address filter register. LAFM is valid
only when ENP is set. LAFM is set by the Am79C976 controller and cleared by the
host.
Note that if DRCVBC (CSR15, bit 14) is cleared to 0, only BAM, but not LAFM will
be set when a Broadcast frame is received, even if the Logical Address Filter is
programmed in such a way that a Broadcast frame would pass the hash filter. If
DRCVBC is set to 1 and the Logical Address Filter is programmed in such a way that
a Broadcast frame would pass the hash filter, LAFM will be set on the reception of a
Broadcast frame.
This bit does not exist when the Am79C976 controller is programmed to use 16-bit
software structures for the descriptor ring entries (BCR20, bits 7-0, SWSTYLE is
cleared to 0).
P R E L I M I N A R Y
Am79C976
Description
9/14/00