ADM7001XACT1XP Lantiq, ADM7001XACT1XP Datasheet - Page 25

• Manufacturer Part Number: ADM7001XACT1XP
• Manufacturer: Lantiq

Specifications of ADM7001XACT1XP

• Lead Free Status / RoHS Status: Supplier Unconfirmed

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ADM7001 integrates 100Base-X physical sub layer (PHY), 100Base-TX physical medium dependent (PMD)
transceivers, and complete 10Base-T modules into a single chip for both 10 Mbps and 100 Mbps Ethernet
operations. It also supports 100Base-FX operation through external fiber-optic transceivers. The device is capable
of operating in either full-duplex mode or half-duplex mode in either 10 Mbps or 100 Mbps operation. Operational
modes can be selected by hardware configuration pins, software settings of management registers, or determined
by the on-chip auto negotiation logic.
The 10Base-T section of the device consists of the 10 Mbps transceiver module with filters and a Manchester
ENDEC module.
ADM7001 consists of seven kinds of major blocks:
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Each 10/100M PHY block contains:
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3.1
The 100Base-X section of the device implements the following functional blocks:
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The 100Base-X and 10Base-T sections share the following functional blocks:
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The interface used for communication between PHY block and switch core is MII interface.
3.1.1
ADM7001 implements 100Base-X compliant PCS and PMA, and 100Base-TX compliant TP-PMD as illustrated in
Figure
various applications. 100 Mbit/s PHY loop back is included for diagnostic purpose.
3.1.2
For 100Base-TX operation, the on-chip twisted pair receiver that consists of a differential line receiver, an adaptive
equalizer and a base-line wander compensation circuits detects the incoming signal.
ADM7001 uses an adaptive equalizer that changes filter frequency response in accordance with cable length. The
cable length is estimated based on the incoming signal strength. The equalizer tunes itself automatically for any
cable length to compensate for the amplitude and phase distortions incurred from the cable.
Data Sheet
10/100M PHY Block
MAC Interface
LED Display
SMI
Power Management
Clock Generator
Voltage Regulator
10M PHY block
100M PHY block
Auto-negotiation
Other Digital Control Blocks
100Base-X physical coding sub-layer (PCS)
100Base-X physical medium attachment (PMA)
Twisted-pair PMD (TP-PMD) transceiver
Clock synthesizer module
MII Registers
IEEE 802.3u auto negotiation
3. Bypass options for each of the major functional blocks within the 100Base-X PCS provide flexibility for
Function Description
10/100M PHY Block
100Base-X Module
100Base-TX Receiver
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Function Description
Rev. 1.07, 2005-09-12
Data sheet
ADM7001