ADM7001XACT1XP Lantiq, ADM7001XACT1XP Datasheet - Page 59

• Manufacturer Part Number: ADM7001XACT1XP
• Manufacturer: Lantiq

Specifications of ADM7001XACT1XP

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 22
Register Short Name
Res7
Res8
Res9
Res10
Res11
Res12
Res 13
Generic PHY Control/Configuration Register
Note: PHY Control/Configuration Registers start from address 16 to 21.
GPCR
Generic PHY Control/Configuration Register
Field
IFSEL
LBKMD
Res
FLT
Data Sheet
Reserved Registers (cont’d)
Bits
15:14
13:12
11:10
9
Type
ro
rw
ro
rw
Register Long Name
Reserved 7
Reserved 8
Reserved 9
Reserved 10
Reserved 11
Reserved 12
Reserved 13
Description
Interface Select.
Value on RMII_EN and GPSI will be stored in IFSEL[1] and IFSEL[0],
respectively
00
01
1x
Loop Back Mode Select.
When 0.14 LPBK is set to 1, these two bits are set to 01 by default. Value
on these two bits can be modified through MDC/MDIO. When 0.14 LPBK
is set to 0, these two bits are reset to 00 and can't be updated by
MDC/MDIO.
Note: Both 10M and 100M loopback should be covered by AD2106.
00
01
10
11
Reserved
Not Applicable
Enable called output remote fault status
0
1
B
B
B
B
B
B
B
B
B
, MII
, GPSI
, RMII
, Disable Loop back
, PCS Layer Loop back mode
, PMA Layer Loop back mode
, PMD layer loop back mode
FLT_0, Disable.
FLT_1, Enable.
Offset
10
59
H
Registers Description
Rev. 1.07, 2005-09-12
Offset Address
0E
0F
15
1A
1B
1C
1E
H
H
H
H
H
H
H
Data sheet
Reset Value
ADM7001
1000
H