ADM7001XACT1XP Lantiq, ADM7001XACT1XP Datasheet - Page 31

• Manufacturer Part Number: ADM7001XACT1XP
• Manufacturer: Lantiq

Specifications of ADM7001XACT1XP

• Lead Free Status / RoHS Status: Supplier Unconfirmed

noise on the receive inputs will not be mistaken for a valid signal. The squelch circuitry employs a combination of
amplitude and timing measurements (as specified in the IEEE 802.3 10Base-T standard) to determine the validity
of data on the twisted-pair inputs.
The "analog squelch circuit" checks the signal at the start of the packet and any pulses not exceeding the squelch
level (either positive or negative, depending upon polarity) will be rejected. Once this first squelch level is
overcome correctly, the opposite squelch level must then be exceeded within 150ns. Finally, the signal must
exceed the original squelch level within an additional 150ns to ensure that the input waveform will not be rejected.
Only after all these conditions have been satisfied will a control signal be generated to indicate to the remainder
of the circuitry that valid data is present.
Figure 4
Valid data is considered to be present until the squelch level has not been generated for a time longer than 200
ns, indicating end of packet. Once good data has been detected, the squelch levels are reduced to minimize the
effect of noise, causing premature end-of-packet detection. The receive squelch threshold level can be lowered
for use in longer cable applications. This is achieved by setting bit 7 of register address 10
3.1.11
Carrier Sense (CRS) is asserted due to receive activity once valid data is detected via the smart squelch function.
For 10 Mbit/s half duplex operation, CRS is asserted during either packet transmission or reception. For 10 Mbit/s
full duplex and repeater mode operations, the CRS is asserted only due to receive activity.
3.1.12
Collision is detected internal to the MAC, which is generated by an AND function of TXEN and RXDV derived from
internal timing recovery circuitry. Note should be taken that due to TXEN and RXDV are asynchronous to each
other, COL signal outputted by ADM7001 is irrelevant to either TXCLK or RXCLK.
Data Sheet
10Base-T Block Diagram and Data Path
Carrier Sense
Collision Detection
31
Function Description
Rev. 1.07, 2005-09-12
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Data sheet
ADM7001