ADM7001XACT1XP Lantiq, ADM7001XACT1XP Datasheet - Page 27

• Manufacturer Part Number: ADM7001XACT1XP
• Manufacturer: Lantiq

Specifications of ADM7001XACT1XP

• Lead Free Status / RoHS Status: Supplier Unconfirmed

forward and Decision Feedback techniques meets the requirement of BER less than 10-12 for transmission on
CAT5 twisted pair cable ranging from 0 to 140 meters.
NRZI/NRZ and Serial/Parallel Decoder
The recovered data is converted from NRZI to NRZ. The data is not necessarily aligned to 4B/5B code group’s
boundary.
Data Descrambling
The descrambler acquires synchronization with the data stream by recognizing idle bursts of 40 or more bits and
locking its deciphering Linear Feedback Shift Register (LFSR) to the state of the scrambling LFSR. Upon achieving
synchronization, the incoming data is XORed by the deciphering LFSR and descrambled.
In order to maintain synchronization, the descrambler continuously monitors the validity of the unscrambled data
that it generates. To ensure this, a link state monitor and a hold timer are used to constantly monitor the
synchronization status. Upon synchronization of the descrambler the hold timer starts a 722 µs countdown. Upon
detection of at least 6 idle symbols (30 consecutive 1) within the 722 µs period, the hold timer will reset and begin
a new countdown. This monitoring operation will continue indefinitely to give a properly operating network
connection with good signal integrity. If the link state monitor does not recognize at least 6 unscrambled idle
symbols within 722 µs period, the descrambler will be forced out of the current state of synchronization and reset
in order to re-acquire synchronization.
Symbol Alignment
The symbol alignment circuit in the ADM7001 determines code word alignment by recognizing the /J/K delimiter
pair. This circuit operates on unaligned data from the descrambler. Once the /J/K symbol pair (11000 10001) is
detected, subsequent data is aligned on a fixed boundary.
Symbol Decoding
The symbol decoder functions as a look-up table that translates incoming 5B symbols into 4B nibbles as shown
in
symbol with MAC preamble. All subsequent 5B symbols are converted to the corresponding 4B nibbles for the
duration of the entire packet. This conversion ceases upon the detection of the /T/R symbol pair denoting the end
of stream delimiter (ESD). The translated data is presented on the internal RXD[3:0] signal lines with RXD[0]
represents the least significant bit of the translated nibble.
Table 12
PCS Code-Group[4:0]
11110
01001
10100
10101
01010
01011
01110
01111
10010
10011
10110
10111
Data Sheet
Table
12. The symbol decoder first detects the /J/K symbol pair preceded by idle symbols and replaces the
Look-up Table for Translating 5B Symbols into 4B Nibbles
Name
0
1
2
3
4
5
6
7
8
9
A
B
MII (TXD/RXD)<3:0>
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
27
Interpretation
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Data 9
Data A
Data B
Function Description
Rev. 1.07, 2005-09-12
Data sheet
ADM7001