ADM7001XACT1XP Lantiq, ADM7001XACT1XP Datasheet - Page 8
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ADM7001XACT1XP
Manufacturer Part Number
ADM7001XACT1XP
Description
Manufacturer
Lantiq
Datasheet
1.ADM7001XACT1XP.pdf
(92 pages)
Specifications of ADM7001XACT1XP
Lead Free Status / RoHS Status
Supplier Unconfirmed
1
Features and Block Diagram.
1.1
The ADM7001 is a single chip one port 10/100M PHY, which is designed for today’s low cost and low power dual
speed application.
It supports auto sensing 10/100 Mbps ports with on-chip clock recovery and base line wander correction including
integrated MLT-3 functionality for 100 Mbps operation, and also supports Manchester Code Converter with on chip
clock recovery circuitry for 10 Mbps functionality. Meanwhile, it provides Medium Independent Interface (MII),
Reduced Medium Independent Interface (RMII) and General Purpose Serial Interface (GPSI), three different
interfaces in different applications.
For today's IA (Information Application), ADM7001 supports "Auto Cross Over Detection" function to eliminate the
technical barrier between networking and end user. With the aid of this auto cross over detection function, Plug-
n-Play feature can be easily applied to IA relative products.
The major design target for ADM7001 is to reduce the power consumption and system radiation for the whole
system. With the aid of this low power consumption and low radiation chip, the fan and on-system power supply
can be removed to save the total manufacture cost and make SOHO application achievable.
1.1.1
Product Name
ADM7001
1) contact Infineon for the updated ordering information
1.2
Main features:
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Data Sheet
IEEE 802.3 compatible 10Base-T and 100Base-T physical layer interface and ANSI X3.263 TP-PMD
compatible transceiver.
Single chip, integrated physical layer and transceivers for 10Base-T and 100BASE-TX function.
Medium Independent Interface (MII), Reduced MII (RMII) and General Purpose Serial Interface (GPSI) for high
port count switch.
Built-in 10 Mbit transmit filter.
10 Mbit PLL, exceeding tolerances for both preamble and data jitter.
100 Mbit PLL, combined with the digital adaptive equalizer and performance up to 120 meters for UTP 5.
125 MHz Clock Generator and Timing Recovery.
Integrated Base Line Wander Correction.
Carrier Integrity Monitor function supported.
Supports FEFI when Auto Negotiation disabled.
Supports Auto MDIX function for Plug-and-Play
IEEE 802.3u Clause 28 compliant auto negotiation for full 10 Mbit/s and 100 Mbit/s control.
Supports programmable LED for different Switch Application and Power On LED Self Test.
Supports Cable Length Indication both in MII Register and LED (Programmable)
Supports PECL interface for fiber connection.
Supports TP vs. FX Medium Converter function.
Supports Fault Propagation function for medium converter.
Supports 10K Bytes Jumbo Packet with Clock Skew 150 ppm.
Product Overview
Overview
Package Information
Features
Product Type
ADM7001
8
Package
LQFP-48-1
Ordering Number
Q67801H 2A
Rev. 1.07, 2005-09-12
Product Overview
1)
Data sheet
ADM7001