TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 143

• Manufacturer Part Number: TXC-06412BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06412BIOG

• Lead Free Status / RoHS Status: Not Compliant

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11.13.2 Ingress Direction
11.13.1.4 Per PPP Stream Counters
11.13.2.1 Shared Settings for all PPP Streams
11.13.2.2 Per PPP Stream Settings
11.13.2.3 Per PPP Stream Alarms
Translation of the PPP packet stream addresses (0, 1, . . . , 11) into 12 configurable 5-bit
POS-PHY addresses is done in the POS-PHY interface block.
When the Tx FIFO underruns during a frame transfer, the abort sequence (0x7D7E) is
inserted.
Note that in transparent mode an underflow error is only reported when it occurs in the middle
of a packet (this means between a SOP and an EOP indication). Underflow error is not
reported when it occurs in between packets (this means after an EOP indication but before
the next SOP indication).
• Number of packets (0 . . . 2
• Number of frames (0 . . . 255) with FCS error, abort (0x7D7E) or mismatched Address/
• Number of frames (0 . . . 255) longer than Maximum Frame Length
• Number of frames (0 . . . 255) shorter than Minimum Frame Length
• Enable/disable one second performance monitoring mechanism (shared with ingress
• FIFO Threshold: the number of free words which has to be available in the
• Enable/disable mapping (shared with Ingress ATM): when disabled, flag characters
• Enable/disable transparent mode. When enabled, the HDLC functionality is bypassed,
• Enable/disable Address (0xFF) and Control (0x03) Fields insertion (don’t care in
• Enable/disable FCS calculation (don’t care in transparent mode)
• FCS size (16 or 32 bit) (don’t care in transparent mode)
• Multiple Flag: selects the minimum number of flag characters (0x7E) that are inserted
• Enable/disable scrambling
• FIFO Underflow: underflow occurred in Tx FIFO while a packet is being transmitted
- High Order Pointer Tracking, Retiming and Pointer Generation -
Control fields
ATM)
synchronization FIFO in the Tx direction before the POS/ATM Mapper starts reading
data from that FIFO. This value must always be different from 0. Note that setting this
value to X means that once reading of a packet from the FIFO is started, at least X+1
number of words can be read (shared with ingress ATM).
(0x7E) are inserted as payload (shared with ingress ATM)
i.e., all “packets” are transparently mapped into the payload (no interframe flag
insertion, no byte stuffing, no abort handling, no FCS defined). Note that the
transparent packets must always have an even number of bytes.
transparent mode)
between 2 frames (one or two) (don’t care in transparent mode)
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-1) forwarded towards Rx FIFO (shared with egress ATM)
PRELIMINARY TXC-06412B-MB, Ed. 2
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005