TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 17
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TXC-06412BIOG
Manufacturer Part Number
TXC-06412BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet
1.TXC-06412BIOG.pdf
(226 pages)
Specifications of TXC-06412BIOG
Lead Free Status / RoHS Status
Not Compliant
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Part Number:
TXC-06412BIOG
Manufacturer:
TRANSWITCH
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1.6 HIGH ORDER PATH LAYER PROCESSING
1.7 HIGH ORDER PATH CROSS-CONNECT
1.8 ATM CELL HANDLING
• Insertion and monitoring of MS/line AIS
• Insertion and monitoring of the K1/K2 APS signal
• Insertion and monitoring of the S1 synchronization status message (SSM)
• All received MSOH bytes are stored in on-chip memory and transmitted on the TOH port
• All MSOH bytes can be inserted from on-chip memory or from the TOH port
• J1 Trail Trace Identifier:
• B3 BIP-8 insertion and monitoring
• C2 Trail Signal Label insertion and monitoring
• G1 insertion and monitoring
• K3 insertion and monitoring
• Unequipped and Supervisory Unequipped generation and detection
• Unidirectional mode
• All received POH bytes are stored in on-chip memory and transmitted on the POH port
• All POH bytes can be inserted from on-chip memory except for B3, which is used as an
• Non-blocking 36x36 cross-connect:
• VC-3/STS-1 SPE granularity allowing cross connecting at VC-3/VC-4/VC-4-Xc/STS-1/
• Path loopbacks and multi-casts are supported
• Each individual output channel can be forced to source an AIS or unequipped mainte-
• Egress: ATM cell demapping from SDH/SONET streams
• Insertion and monitoring of single repeating byte, 16-byte and 64-byte trace messages
• Trace identifier mismatch detection
• Degraded signal and excessive bit error detection
• Block and bit error performance monitoring counters
• Unequipped, VC-AIS, payload mismatch detection
• Single bit RDI and three bit E-RDI
• REI insertion and block/bit performance monitoring counter
• Automatic Protection Switching detection
errormask
• 3 input and 3 output ports: line side, APS port and terminal side
• 12 time slot channels per port
STS-3c/STS-6c/STS-9c/STS-12c SPE level
nance signal
• Cell delineation including header error detection and correction
• HEC checking
- Features -
PRELIMINARY TXC-06412B-MB, Ed. 2
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005
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