TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 169
TXC-06412BIOG
Manufacturer Part Number
TXC-06412BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet
1.TXC-06412BIOG.pdf
(226 pages)
Specifications of TXC-06412BIOG
Lead Free Status / RoHS Status
Not Compliant
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Part Number:
TXC-06412BIOG
Manufacturer:
TRANSWITCH
Quantity:
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Offset
Offset
0x003A 10 - 0
0x003C 10 - 0
0x003E 10 - 0
0x0034 3 - 0
0x0038 5 - 0
0x0040
0x0000 10 - 0
0x0002 15 - 0
0x0004 3 - 0
0x0006 Growth_Mask
0x0008 12 - 0
3 - 0
7 - 4
Bits
Bits
RamResetDone
GlobalControlSummary_Unlatched
GlobalControlSummary_Mask
GP_Output
GlobalControlSummary_LatchForInt
ScratchPad
ManufacturerIdentity
PartNumber
Version
MaskLevel
GrowthField
Reserved
Name
Table 3: Device Identification
Name
Table 2: Global Control
- Memory Maps and Bit Descriptions -
0x190C Part Number (06412).
Init
0x6B Manufacturer Identity, assigned by the Solid State Products
0x0 Version or revision level. The initial version will be 0x0. The version
0x0 Indicates the Mask Level.
0x0 Indicates the Growth Field.
0x0 Reserved.
All 0x0 rw
Init
0x7FF rw
0x0 rw
0x0 ro
0x0 ro
0x0 cow_1
Engineering Council (JEDEC) to the TranSwitch Corporation (0x06B
= "0001101011").
register will be incremented with each new revision of the part.
Access
(T_GLOBAL_CONTROL)
(T_DeviceIdentification)
For every bit in the list, 0x1 means the RAMs of the
Global Control Interrupt Summary.
Global Control Interrupt Summary.
Global Control Interrupt Summary Mask.
General purpose output (GPOUT4..GPOUT1).
corresponding clock domain are initialized, 0x0 the
RAMs are not initialized.
See GlobalControlSummary_Unlatched for details.
See GlobalControlSummary_Unlatched register for
details.
Array (32) of two_bytes
Offset between two elements = 0x2.
Array index indicates the scratch pad address.
Scratch pad: general purpose read/write memory
which can be used as scratch pad by the device
driver.
• bit 0: System Clock domain
• bit 1: Rx Line 1 Clock domain
• bit 2: Rx Line 2 Clock domain
• bit 3: Rx Line 3 Clock domain
• bit 4: Rx Line 4 Clock domain
• bit 5: Rx APS Clock domain
• bit 0: Loss of System Clock
• bit 1: Loss of Rx Line 1 Clock
• bit 2: Loss of Rx Line 2 Clock
• bit 3: Loss of Rx Line 3 Clock
• bit 4: Loss of Rx Line 4 Clock
• bit 5: Loss of Rx APS Clock
• bit 6: Loss of Rx UTOPIA Clock
• bit 7: Loss of Tx UTOPIA Clock
• bit 8: Reserved
• bit 9: Acknowledge Time Out
• bit 10: One Second Reference
Description
PRELIMINARY TXC-06412B-MB, Ed. 2
Description
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005
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