TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 178

• Manufacturer Part Number: TXC-06412BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06412BIOG

• Lead Free Status / RoHS Status: Not Compliant

PHAST-12P Device
DATA SHEET
TXC-06412B
PRELIMINARY TXC-06412B-MB, Ed. 2
June 2005
Offset
Offset
0x008C 7 - 0
0x008A 7 - 0
0x008E 7 - 0
0x0000 0
0x0000
0x0080 7 - 0
0x0082 7 - 0
0x0084 7 - 0
0x0086 7 - 0
0x0088 7 - 0
1
2
3
4
5
Bits
Bits
J1
B3_ErrorMask
C2
G1
F2
H4
F3
K3
N1
Force_AIS
Force_Uneq
Force_SupUneq
UniDirectional
OneBitRDI
Reserved
Table 22: POH Generator Path Mode
Table 21: Transmit POH Byte RAM
Name
Name
-
Memory Maps and Bit Descriptions
Init
Init
All 0x0 Array (64) of byte
0x0 Mask used on the B3 byte, set to default value for normal operation.
0x0 Signal label to be inserted.
0x0 Value used when G1 is inserted out of RAM.
0x0 Value used when F2 is inserted out of RAM.
0x0 Value used when H4 is inserted out of RAM.
0x0 Value used when F3 is inserted out of RAM.
0x0 Value used when K3 is inserted out of RAM.
0x0 Value used when N1 is inserted out of RAM.
0x0 AIS insertion is forced in the corresponding high order path when 0x1.
0x0 Unequipped is forced in the corresponding high order path when 0x1.
0x0 Supervisory Unequipped is forced in the corresponding high order
0x0 Uni-directional option is activated (G1 byte will be filled with 0x00,
0x0 RDI is encoded in one bit when 0x1, in three bits (Enhanced RDI)
0x0 Reserved.
path when 0x1.
regardless the byte provided from the selected source) when 0x1.
when 0x0.
Offset between two elements = 0x2.
Array index indicates the TTI byte number.
TTI-message for insertion in the J1 location.
• bytes 0-15 for 16 byte TTI message
• bytes 0-63 for 64 byte TTI message
(T_VCXPG_RAMBytes)
(T_VCXPG_Mode_record)
-
Description
Description
1 7 8 o f 2 26