TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 186

• Manufacturer Part Number: TXC-06412BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06412BIOG

• Lead Free Status / RoHS Status: Not Compliant

PHAST-12P Device
DATA SHEET
TXC-06412B
PRELIMINARY TXC-06412B-MB, Ed. 2
June 2005
Offset
Offset
0x0000 0
0x0000 Sources
0x0002 15 - 0
0x0004 2 - 0
0x0006 0
0
1
2
4 - 3
6 - 5
Bits
Bits
TOH_Port_Enable
RSOH_DCC_Select
DCC_Port_Enable
REI_Ring_Port_Enable
K1K2_Source
RDI_Source
K1K2_Value
RDI_Value
Scrambling_Disable
Table 35: Transmit TOH Port Configuration
Name
Name
Table 36: TOH Configuration
-
Memory Maps and Bit Descriptions
Init
Init
0x0 Enables TX side TOH port when 0x1.
0x0 Select mode for DCC port. The DCC port requests RS DCC bytes
0x0 The DCC port is enabled when 0x1 and RSOH_DCC_Port_Select
0x1 REI, in M1. M1 contents is taken from Ring Port when 0x1, default
0x0 Source for K1 and K2 bytes:
0x2 Source for RDI, in K2 (b6-b8).
0x0 Values for K1 and K2 bytes, used when Source is Register.
0x0 RDI value used to overwrite b1-b3 of K2 when RDI Source = Register.
0x0 Scrambling is disabled when 0x1. Scrambling must be enabled in
(D1-D3) when 0x1 and MS DCC bytes (D4-D12) when 0x0. Only valid
when DCC port is enabled.
setting determines which set of DCC bytes will be filled in from the
DCC port (RS DCC or MS DCC). For the other set, default behavior
applies (see TOH_Contents).
Default behavior applies both for RSOH and MSOH DCC bytes when
0x0.
behavior applies when 0x0.
K1 is least significant byte, K2 is most significant byte.
normal operation.
• 0x0 = Register
• 0x1 = TOH Port
• 0x2 = Rx APS
• 0x3 = Reserved
• 0x0 = Register
• 0x1 = TOH Port
• 0x2 = Ring Port
• 0x3 = None
(T_TOHG_Line_Config)
(T_TOHG_Common_Config)
-
Description
Description
1 8 6 o f 2 26