PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 156

• Manufacturer Part Number: PIC24FJ64GA306-I/MR
• Description: 16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
• Manufacturer: Microchip Technology

PIC24FJ128GA310 FAMILY
TABLE 10-2:
10.1.1
Three of the power-saving modes are entered through
the execution of the PWRSAV instruction. Sleep mode
stops clock operation and halts all code execution. Idle
mode halts the CPU and code execution, but allows
peripheral modules to continue operation. Deep Sleep
mode stops clock operation, code execution and all
peripherals, except RTCC and DSWDT. It also freezes
I/O states and removes power to Flash memory and
may remove power to SRAM.
The assembly syntax of the PWRSAV instruction is shown
in
directly with a single assembler command. Deep Sleep
requires an additional sequence to unlock and enable
the entry into Deep Sleep, which is described in
Section 10.4.1 “Entering Deep Sleep
EXAMPLE 10-1:
DS39996F-page 156
Idle
Sleep (all modes)
Deep Sleep
V
Note 1:
// Syntax to enter Sleep mode:
PWRSAV
//
//Synatx to enter Idle mode:
PWRSAV
//
// Syntax to enter Deep Sleep mode:
// First use the unlock sequence to set the DSEN bit (see
CLR
CLR
BSET
BSET
PWRSAV
BAT
Example
Note:
Mode
2:
DSCON
DSCON
DSCON, #DSEN
DSCON, #DSEN
Deep Sleep WDT.
Code execution resumption is also valid for all the exit conditions; for example, a MCLR and POR exit will
cause code execution from the Reset vector.
INSTRUCTION-BASED
POWER-SAVING MODES
10-1. Sleep and Idle modes are entered
SLEEP_MODE
constants defined in the assembler
include file for the selected device.
To enter Deep Sleep, the DSCON<0> bit
should be cleared before setting the
DSEN bit,
EXITING POWER SAVING MODES
#SLEEP_MODE
#IDLE_MODE
#SLEEP_MODE
PWRSAV INSTRUCTION SYNTAX
All
N
N
Y
Y
Interrupts
and
INT0
Y
Y
Y
N
IDLE_MODE
Mode”.
All
; Put the device into SLEEP mode
; Put the device into IDLE mode
; (repeat the command)
; Enable Deep Sleep
; Enable Deep Sleep (repeat the command)
; Put the device into Deep SLEEP mode
Y
Y
N
N
are
Resets
POR
Exit Conditions
Y
Y
Y
N
MCLR
Y
Y
N
Y
Sleep and Idle modes can be exited as a result of an
enabled interrupt, WDT time-out or a device Reset.
When the device exits these modes, it is said to
“wake-up”.
The features enabled with the low-voltage/retention
regulator results in some changes to the way that Sleep
mode behaves. See
10.1.1.1
Any interrupt that coincides with the execution of a
PWRSAV instruction will be held off until entry into
Sleep/Deep Sleep or Idle mode has completed. The
device will then wake-up from Sleep/Deep Sleep or Idle
mode.
RTCC
Alarm
Example
Y
Y
Y
N
Interrupts Coincident with Power
Save Instructions
WDT
Y
10-2)
Y
Y
N
 2010-2011 Microchip Technology Inc.
(1)
Section 10.3 “Sleep
Restore
V
N/A
N/A
N/A
Y
DD
Next instruction
Reset vector
Reset vector
Resumes
Execution
Mode”.
Code
(2)