PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 307

• Manufacturer Part Number: PIC24FJ64GA306-I/MR
• Description: 16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
• Manufacturer: Microchip Technology

REGISTER 24-6:
REGISTER 24-7:
 2010-2011 Microchip Technology Inc.
bit 7-5
bit 4-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2
bit 1
bit 0
U-0
U-0
—
—
2:
These input channels do not have corresponding memory mapped result buffers.
These channels are implemented in 100-pin devices only.
CH0NA<2:0>: Sample A Channel 0 Negative Input Select bits
Same definitions as for CHONB<2:0>.
CH0SA<4:0>: Sample A Channel 0 Positive Input Select bits
Same definitions as for CHOSB<4:0>.
Unimplemented: Read as ‘0’
VBG6EN: A/D Input V
1 = Band gap voltage, divided by six reference (V
0 = Band gap, divided by six reference (V
VBG2EN: A/D Input V
1 = Band gap voltage, divided by two reference (V
0 = Band gap, divided by two reference (V
VBGEN: A/D Input V
1 = Band gap voltage reference (V
0 = Band gap reference (V
U-0
U-0
—
—
AD1CHS: A/D SAMPLE SELECT REGISTER (CONTINUED)
ANCFG: A/D BAND GAP REFERENCE CONFIGURATION
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
BG
BG
BG
/6 Enable bit
/6 Enable bit
/6 Enable bit
BG
/6) is disabled
PIC24FJ128GA310 FAMILY
U-0
U-0
—
—
BG
/6) is enabled
BG
BG
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
/6), is disabled
/6), is disabled
U-0
U-0
—
—
BG
BG
/6), is enabled
/6), is enabled
VBG6EN
R/W-0
U-0
—
x = Bit is unknown
VBG2EN
R/W-0
U-0
—
DS39996F-page 307
VBGEN
R/W-0
U-0
—
bit 8
bit 0