ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 12

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

7. Functional description
ISP1362_7
Product data sheet
7.1 On-The-Go (OTG) controller
7.2 Advanced ST-Ericsson slave host controller
7.3 ST-Ericsson peripheral controller
7.4 Phase-Locked Loop (PLL) clock multiplier
7.5 USB and OTG transceivers
7.6 Overcurrent protection
7.7 Bus interface
7.8 Peripheral controller and host controller buffer memory
The OTG controller provides all the control, monitoring and switching functions required in
OTG operations.
The advanced ST-Ericsson slave host controller is designed for highly optimized USB
host functionality. Many advanced features are integrated to fully utilize the USB
bandwidth. A number of tasks are performed at the hardware level. This reduces the
requirement on the microprocessor and thus speeds up the system.
The ST-Ericsson peripheral controller is a high performance USB device with up to 14
programmable endpoints. These endpoints can be configured as double-buffered
endpoints to further enhance the throughput.
A 12 MHz-to-48 MHz clock multiplier PLL is integrated on-chip. This allows the use of a
low-cost 12 MHz crystal that also minimizes ElectroMagnetic Interference (EMI) because
of low frequency. No external components are required for the operation of PLL.
The integrated transceivers (for typical downstream port) directly interface to the USB
connectors (type A) and cables through some termination resistors. The transceiver is
compliant with
The ISP1362 has a built-in overcurrent protection circuitry. This feature monitors the
current drawn on the downstream V
the current threshold. The built-in overcurrent protection feature can be used when the
port acts as a host port.
The bus interface connects the microprocessor to the USB host and the USB device,
allowing fast and easy access to both.
4096 bytes (host) and 2462 bytes (device) of built-in memory provide sufficient space for
the buffering of USB traffic. Memory in the host controller is addressable by using the fast
and versatile direct addressing method.
Ref. 2 “Universal Serial Bus Specification Rev.
Rev. 07 — 29 September 2009
BUS
and switches off V
Single-chip USB OTG controller
BUS
2.0”.
when the current exceeds
© ST-ERICSSON 2009. All rights reserved.
ISP1362
12 of 147