ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 121

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Table 142. DcInterrupt register: bit allocation
ISP1362_7
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
BUSTATUS
EP14
EP6
31
23
15
R
R
R
0
0
7
0
-
-
Table 143. DcInterrupt register: bit description
Bit
31 to 24
23 to 10
9
8
7
6
5
4
3
2
1
0
SP_EOT
EP13
EP5
30
22
14
R
R
R
0
0
6
0
-
-
Symbol
-
EP14 to EP1
EP0IN
EP0OUT
BUSTATUS
SP_EOT
PSOF
SOF
EOT
SUSPND
RESUME
RESET
PSOF
EP12
EP4
29
21
13
R
R
R
0
0
5
0
-
-
Rev. 07 — 29 September 2009
Description
reserved
Logic 1 indicates the interrupt source(s): endpoints 14 to 1.
Logic 1 indicates the interrupt source: control IN endpoint.
Logic 1 indicates the interrupt source: control OUT endpoint.
Monitors the current USB bus status (0 = awake, 1 = suspend).
Logic 1 indicates that an EOT interrupt has occurred for a short
period.
Logic 1 indicates that an interrupt is issued every 1 ms because of
the pseudo SOF; after three missed SOFs, the suspend state is
entered.
Logic 1 indicates that an SOF condition was detected.
Logic 1 indicates that an internal EOT condition was generated by
the DMA counter reaching zero.
Logic 1 indicates that an awake to suspend change of state was
detected on the USB bus.
Logic 1 indicates that a resume state was detected.
Logic 1 indicates that a bus reset condition was detected.
EP11
SOF
EP3
28
20
12
R
R
R
0
0
4
0
-
-
reserved
EP10
EOT
EP2
27
19
11
R
R
R
0
0
3
0
-
-
SUSPND
Single-chip USB OTG controller
EP9
EP1
26
18
10
R
R
R
0
0
2
0
-
-
RESUME
EP0IN
© ST-ERICSSON 2009. All rights reserved.
EP8
25
17
R
R
R
0
9
0
1
0
-
-
ISP1362
EP0OUT
RESET
121 of 147
EP7
24
16
R
R
R
0
8
0
0
0
-
-