ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 54

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

ISP1362_7
Product data sheet
12.4.1 Selecting an endpoint for the DMA transfer
12.4.2 8237 compatible mode
12.4 Peripheral controller DMA transfer
Direct Memory Access (DMA) is a method to transfer data from one location to another in
a computer system, without the intervention of the CPU. Many different implementations
of DMA exist. The peripheral controller supports 8237 compatible mode.
8237 compatible mode: Based on the DMA subsystem of the IBM personal computers
(PC, AT, and all its successors and clones). This architecture uses the Intel 8237 DMA
controller and has separate address spaces for memory and I/O.
The following features are supported:
The target endpoint for DMA access is selected using bits EPDIX[3:0] of the
DcDMAConfiguration register, as shown in
is automatically set by the EPDIR bit in the associated ECR, to match the selected
endpoint type (OUT endpoint: read; IN endpoint: write).
Automatically asserting input DACK2 selects the endpoint specified in the
DcDMAConfiguration register, regardless of the current endpoint used for I/O mode
access.
Table 18.
This mode is selected by clearing the DAKOLY bit of the DcHardwareConfiguration
register (see
Endpoint
identifier
1
2
3
4
5
6
7
8
9
10
11
12
13
14
•
•
•
•
Single-cycle or burst transfers (up to 16 bytes per cycle)
Programmable transfer direction (read or write)
Multiple End-Of-Transfer (EOT) sources: internal conditions, short or empty packet
Programmable signal levels on pins DREQ2 and DACK2
Endpoint selection for the DMA transfer
Table
116). The pin functions for this mode are shown in
EPIDX[3:0]
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Rev. 07 — 29 September 2009
Transfer direction
EPDIR = 0
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
Table
18. The transfer direction (read or write)
Single-chip USB OTG controller
EPDIR = 1
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
© ST-ERICSSON 2009. All rights reserved.
Table
ISP1362
19.
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