ISP1362BDTM STEricsson, ISP1362BDTM Datasheet - Page 46

• Manufacturer Part Number: ISP1362BDTM
• Manufacturer: STEricsson

Specifications of ISP1362BDTM

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

ISP1362_7
Product data sheet
11.8.1 Using internal overcurrent detection circuit
11.8 Overcurrent protection circuit
The ISP1362 has a built-in overcurrent protection circuitry. You can enable or disable this
feature by setting or resetting AnalogOCEnable (bit 10) of the HcHardwareConfiguration
register. If this feature is disabled, it is assumed that there is an external overcurrent
protection circuitry.
An application using the internal overcurrent detection circuit and internal 15 kΩ pull-down
resistors is shown in
DPn denotes either OTG_DP1 or H_DP2. In this example, the HCD must set both
AnalogOCEnable and ConnectPullDown_DS1 (bit 10 and bit 12 of the
HcHardwareConfiguration register, respectively) to logic 1.
When H_OCn detects an overcurrent status on a downstream port, H_PSWn will output
HIGH to turn off the 5 V power supply to downstream port V
detection, H_PSWn will output LOW to turn on the 5 V power supply to downstream port
V
In general applications, you can use a P-channel MOSFET as the power switch for V
Connect the 5 V power supply to the source pole of the P-channel MOSFET, V
drain pole, and H_PSWn to the gate pole. This voltage drop (ΔV) across the drain and
source poles can be called the overcurrent trip voltage. For the internal overcurrent
detection circuit, a voltage comparator has been designed-in, with a nominal voltage
threshold of 75 mV. Therefore, when the overcurrent trip voltage (ΔV) exceeds the voltage
threshold, H_PSWn will output a HIGH level to turn off the P-channel MOSFET. If the
P-channel MOSFET has R
selection of a P-channel MOSFET with a different R
overcurrent threshold.
Fig 23. Using internal overcurrent detection circuit
BUS
.
chassis
chassis
(1) 100 μF for the host port, or 4.7 μF for the OTG port.
V
GND
BUS
DM
DP
1
2
3
4
5
6
Rev. 07 — 29 September 2009
Figure
DGND
DGND
C41 (1)
DSon
23, where DMn denotes either OTG_DM1 or H_DM2, while
of 150 mΩ, the overcurrent threshold will be 500 mA. The
DGND
C17
0.1 μF
P_channel
MOSFET
FB2
source
drain
DSon
Single-chip USB OTG controller
gate
will result in a different
BUS
. When there is no such
C18
0.1 μF
© ST-ERICSSON 2009. All rights reserved.
ISP1362
R31
10 kΩ
004aaa148
V
PSU_5V
H_PSWn
H_OCn
DD(REF5V)
BUS
46 of 147
to the
BUS
.