NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 104

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

5.1.27
5.1.28
5.1.29
104
SS_CAPID—Subsystem ID and Vendor ID Capabilities
(D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
This capability is used to uniquely identify the subsystem where the PCI device resides.
Because this device is an integrated part of the system and not an add-in device, it is
anticipated that this capability will never be used. However, it is necessary because
Microsoft will test for its presence.
SS—Subsystem ID and Subsystem Vendor ID (D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
System BIOS can be used as the mechanism for loading the SSID/SVID values. These
values must be preserved through power management transitions and hardware reset.
MSI_CAPID—Message Signaled Interrupts Capability ID
(D1:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
When a device supports MSI it can generate an interrupt request to the processor by
writing a predefined data item (a message) to a predefined memory address.
31:16
31:16
15:8
15:0
7:0
Bit
Bit
Access &
Access &
Default
Default
0000 h
8086 h
R/WO
R/WO
0D h
80h
RO
RO
Reserved
Pointer to Next Capability
This contains a pointer to the next item in the capabilities list which is the PCI
Power Management capability.
Capability ID
Value of 0Dh identifies this linked list item (capability structure) as being for SSID/
SSVID registers in a PCI-to-PCI Bridge.
Subsystem ID (SSID)
Identifies the particular subsystem and is assigned by the vendor.
Subsystem Vendor ID (SSVID)
Identifies the manufacturer of the subsystem and is the same as the vendor ID
which is assigned by the PCI Special Interest Group.
1
88h
0000800Dh
RO
32 bits
1
8Ch
00008086h
RO
32 bits
1
90h
A005h
RO
16 bits
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Description
Description
Host-PCI Express Bridge Registers (D1:F0)