NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 63

• Manufacturer Part Number: NH82801GR S L8FY
• Manufacturer: Intel

Specifications of NH82801GR S L8FY

• Lead Free Status / RoHS Status: Compliant

Host Bridge Registers (Device 0, Function 0)
4.1.28
4.1.29
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
REMAPBASE - Remap Base Address Register
PCI Device:
Address Offset:
Default Value:
Access:
Size:
REMAPLIMIT - Remap Limit Address Register
PCI Device:
Address Offset:
Default Value:
Access:
Size:
15:10
15:10
9:0
9:0
Bit
Bit
Access &
Access &
Default
Default
3FFh
R/W
R/W
00h
Reserved
Remap Base Address [35:26] (REMAPBASE): The value in this register
defines the lower boundary of the Remap window. The Remap window is inclusive
of this address. In the decoder A[25:0] of the Remap Base Address are assumed
to be 0's. Thus the bottom of the defined memory range will be aligned to a 64
MB boundary.
When the value in this register is greater than the value programmed into the
Remap Limit register, the Remap window is disabled.
Note: Bit 0 (Address Bit 26) must be a 0
Reserved
Remap Limit Address [35:26] (REMAPLMT): The value in this register
defines the upper boundary of the Remap window. The Remap window is inclusive
of this address. In the decoder A[25:0] of the remap limit address are assumed
to be F's. Thus the top of the defined range will be one less than a 64 MB
boundary.
When the value in this register is less than the value programmed into the Remap
Base register, the Remap window is disabled.
Note: bit 0 (address bit 26) must be a 0
0
98-99h
03FFh
R/W;
16 bits
0
9A-9Bh
0000h
R/W
16 bits
Description
Description
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