NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 152

• Manufacturer Part Number: NQ5000P S L9TN
• Manufacturer: Intel

Specifications of NQ5000P S L9TN

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

3.8.11.10
152
PEXSLOTCTRL[7:2, 0] - PCI Express Slot Control Register
The Slot Control register identifies the PCI Express specific slot control specific
parameters for operations such as hot-plug and Power Management. Software issues a
command to a hot-plug capable Port by issuing a write transaction that targets Slot
Control Register fields viz, PWRCTRL, PWRLED, ATNLED described below. A single write
to the Slot Control register is considered to be a single command, even if the write
affects more than one field in the Slot Control register. In response to this transaction,
the port must carry out the requested actions and then set the associated status field
(PEXSLOTS.CMDCMP) for the command completed event. The PEXSLOTSTS.CMDCMP
bit will be set only when there is a unique change to the state of the PWRCTRL,
PWRLED, ATNLED in this register.
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
15:11
9:8
Bit
10
Attr
RW
RW
RV
0, 2-3
0
84h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
4-5
0
84h
Intel 5000Z Chipset
4-7
0
84h
Intel 5000P Chipset
Default
0h
0h
0h
Reserved.
PWRCTRL:
This bit indicates the current state of the Power applied to the slot of the PCI
Express port
0: Power On
1: Power Off
PWRLED: Power Indicator Control
This bit indicates the current state of the Power Indicator of the PCI Express
port
00: Reserved.
01: On
10: Blink (The Intel 5000P Chipset MCH drives 1.5 Hz square wave for Chassis
mounted LEDs in the case of legacy card form factor for PCI Express devices)
11: Off
Default is set to 11b (OFF)
When this field is written, the Intel 5000P Chipset MCH sends appropriate
POWER_INDICATOR messages through the PCI Express port. For legacy card
based PCI Express devices, the event is signaled via the virtual pins
Intel 5000P Chipset MCH, in addition. For PCI Express modules with advanced
form factor that incorporate LEDs and onboard decoding logic, the PCI Express
messages are interpreted directly (No virtual pins).
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
Power Controller Control
.
Description
Register Description
1
of the