NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 188

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NQ5000P S L9TN

Manufacturer Part Number
NQ5000P S L9TN
Description
Manufacturer
Intel
Datasheet

Specifications of NQ5000P S L9TN

Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
3.8.13.17
3.8.13.18
3.8.13.19
188
FERR_NF_INT - Internal First Non-Fatal Error Register
NERR_FAT_INT - Internal Next Fatal Error Register
NERR_NF_INT - Internal Next Non-Fatal Error Register
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
7:5
7:3
7:5
7:3
Bit
Bit
Bit
Bit
4
3
2
1
0
2
1
0
4
3
2
1
0
2
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
RWCST
Attr
Attr
Attr
Attr
RV
RV
RV
RV
RV
RV
16
2
C0h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
16
2
C1h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
16
2
C2h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
16
2
C3h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
Default
Default
Default
Default
000
000
0h
0
0
0
0
0
0h
0
0
0
0
0
0
0
0
0
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
Reserved
B7Err: Multiple ECC error in any of the ways during SF lookup
Reserved
B3Err: Coherency Violation Error for WEWB
B2Err: Multi-Tag Hit SF
B1Err: DM Parity Error
Reserved
B8Err: SF Coherency Error for BIL (SF)
Reserved
B7Err: Multiple ECC error in any of the ways during SF lookup (SF)
Reserved
B3Err: Coherency Violation Error (COH) for EWB
B2Err: Multi-Tag Hit SF (SF)
B1Err: DM Parity Error (DM)
Reserved
B8Err: SF Coherency Error for BIL (SF)
B6Err: Single ECC error on SF lookup (SF)
B5Err: Single Address Map Error (COH)
Description
Description
Description
Description
Register Description

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