NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 54
NQ5000P S L9TN
Manufacturer Part Number
NQ5000P S L9TN
Description
Manufacturer
Intel
Datasheet
1.NQ5000P_S_L9TN.pdf
(530 pages)
Specifications of NQ5000P S L9TN
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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3.6
Table 3-7.
54
MCH Fixed Memory Mapped Registers
These registers are mapped into the fixed chipset specific range located from FE60
0000h - FE6F FFFFh.These appear at fixed addresses to support the boot process.
These registers also appear in the regular PCI Express configuration space.
The following table defines the memory address of the registers in this region.
Mapping for Fixed Memory Mapped Registers
BOFL0
BOFL1
BOFL2
BOFL3
SPAD0
SPAD1
SPAD2
SPAD3
SPADS0
SPADS1
SPADS2
SPADS3
AMBASE[31:0]
AMBASE[63:32]
HECBASE
Register
FE60_C000
FE60_C400
FE60_C800
FE60_CC00
FE60_D000
FE60_D400
FE60_D800
FE60_DC00
FE60_E000
FE60_E400
FE60_E800
FE60_EC00
FE61_4800
FE61_4C00
FE61_6400
Memory Address
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
Register Description
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