LSI53CF92A LSI, LSI53CF92A Datasheet - Page 41

• Manufacturer Part Number: LSI53CF92A
• Manufacturer: LSI

Specifications of LSI53CF92A

• Lead Free Status / RoHS Status: Not Compliant

2.8.2.4 Response to Normal Selection
Step 6. Wait until MSG/ has been released by all other devices
Step 7. Assert BSY/ using the
Step 8. Wait two de-skew delays.
Step 9. Assert SEL/ and I/O while maintaining BSY/ asserted. At this
Step 10. Assert DB6 and DB7 by first writing them in the
Step 11. Wait two de-skew delays.
Step 12. Release SEL/ and wait until SEL/ has been deasserted, using
Step 13. Release DB6 and examine the SCSI bus signals. If C/D is not
The response to normal selection attempts is determined by the state of
the ENDR bit (bit 4 in the
slave devices with unconfirmed default IDs may not respond to selection
until a SCAM default ID selection response time period elapses. Setting
the ENDR bit causes the FSC to delay its response to selection, using
the select/reselect
delay period elapses, the FSC responds by asserting BSY/ and
continues to process the selection as described elsewhere in this
technical manual. When this bit is cleared, the FSC responds to normal
selection attempts as soon as it detects that it is being selected (within
a SCAM-tolerant selection response time).
SCAM Capabilities
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
(examine the
wired-OR glitch filtering in software.
time, if the device is a SCAM master, C/D should also be
asserted.
Data Latch (SODL)
bit 2 of the
wired-OR glitch filtering in software.
asserted, then there are no SCAM master devices participating,
and the slave devices releases all signals. If C/D is asserted,
wait for DB6 to be released by all devices, using wired-OR
glitch filtering, then assert SEL/. This completes initiation of the
protocol for response to SCAM selection.
Time-Out
SCSI Control (SCONTROL)
SCSI Bus Control Lines (SBCL)
SCSI Control (SCONTROL)
register to control the delay period. After the
register, then enabling their drivers with
SCSI Output Data Latch (SODL)
register.
register). SCAM
register), using
SCSI Output
register.
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