LSI53CF92A LSI, LSI53CF92A Datasheet - Page 53

• Manufacturer Part Number: LSI53CF92A
• Manufacturer: LSI

Specifications of LSI53CF92A

• Lead Free Status / RoHS Status: Not Compliant

Table 4.2
Register
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
Configuration Register 4, Bit 3 = 0
Register Bank 0
Read
Transfer Counter
Transfer Counter
Middle
FIFO
Command
Status
Interrupt
Sequence Step
FIFO Flags
Configuration 1
(Config 1)
Reserved
Reserved
Configuration 2
(Config 2)
Configuration 3
(Config 3)
Configuration 4
(Config 4)
Transfer Counter
High/ID
Reserved
Register Set
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
Low
Register Bank 0
Write
Transfer Counter
Low
Transfer Counter
Middle
FIFO
Command
Destination Bus ID
Time-Out
Synchronous
Transfer Period
Synchronous Offset
Configuration 1
(Config 1)
Clock Conversion
Test
Configuration 2
(Config 2)
Configuration 3
(Config 3)
Configuration 4
(Config 4)
Transfer Counter
High/ID
Reserved
Configuration Register 4, Bit 3 = 1
Register Bank 1
Read
Transfer Counter
Low
Transfer Counter
Middle
FIFO
Command
Status
Interrupt
Sequence Step
FIFO Flags
SCSI Control
(SCONTROL)
SCSI Status
(SSTATUS)
SCSI Output
Control Latch
(SOCL)
SCSI Bus
Control Lines
(SBCL)
Reserved
Configuration 4
(Config 4)
SCSI Output
Data Latch
(SODL)
SCSI Bus Data
Lines (SBDL)
Register Bank 1
Write
Transfer Counter
Transfer Counter
Middle
FIFO
Command
Destination Bus ID
Time-Out
Synchronous
Transfer Period
Synchronous Offset
SCSI Control
(SCONTROL)
Reserved
SCSI Output Control
Latch (SOCL)
Reserved
Reserved
Configuration 4
(Config 4)
SCSI Output Data
Latch (SODL)
Reserved
Low
4-3