IPSERIALLITE Altera, IPSERIALLITE Datasheet - Page 10

• Manufacturer Part Number: IPSERIALLITE
• Manufacturer: Altera

Specifications of IPSERIALLITE

• Lead Free Status / RoHS Status: Not Compliant

New in Version 1.1.0
Introduction
New in Version
1.1.0
Features
1–2
SerialLite MegaCore Function User Guide
f
The SerialLite MegaCore function is a simple, high-speed, low-latency,
low-resource, point-to-point serial data communication link. It
implements the full SerialLite protocol with performance up to
3.125 Gbps across the serial data communication link. It is highly
configurable, providing a wide range of functionality suited to moving
data in many different environments.
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For details, refer to the SerialLite MegaCore Function Errata Sheet v1.0.0
and v1.1.0 available at www.altera.com/literature/lit-es.jsp.
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Maintenance release
500 Mbps to 3.125 Gbps per lane
Supports up to 16 lanes
Support for two user packet types: data packet and priority packet
Nesting of time-critical priority packets within regular data packets
Unrestricted data packet size
Priority packet size up to 256 bytes
Optional lane polarity reversal
Optional lane order reversal
Optional packet integrity protection using cyclic redundancy code
CRC-32 or CRC-16
Optional priority packet retry-on-error
Optional flow control
Automatic handling of idles
Synchronous or asynchronous operation
Automatic clock rate compensation for asynchronous use
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Error detection
Atlantic
8B/10B physical layer encoding and decoding
Electricals based on familiar XAUI standard
Low protocol overhead and logic usage
Low point-to-point transfer latency
No inter-frame gaps required
Easy-to-use IP Toolbench interface
IP functional simulation models for use in Altera-supported VHDL
and Verilog HDL simulators
Support for OpenCore
MegaCore Function Version 1.1.0
100 and 300 parts per million (ppm)
™
interface compliant
®
Plus evaluation
Altera Corporation
August 2005