IPSERIALLITE Altera, IPSERIALLITE Datasheet - Page 97

• Manufacturer Part Number: IPSERIALLITE
• Manufacturer: Altera

Specifications of IPSERIALLITE

• Lead Free Status / RoHS Status: Not Compliant

Specifications
Altera Corporation
August 2005
Transceiver Control Interface
The SerialLite MegaCore function provides an interface to allow you to
control the V
individually and dynamically. You have the independent option for each
of these characteristics to set the values either at configuration time or
dynamically via a three-bit-per-lane bus. If you select a static setting in the
Parameterize - SerialLite MegaCore function wizard, the control signals
are not created. All lanes have the same settings.
The transceiver control interface (see
signals needed to control the transceiver dynamically. If you select
dynamic control, a three-bit bus is created per characteristic per lane. The
values to be placed on these signals to achieve the desired settings are in
Tables
Figure 3–34. Transceiver Control Interface
If, for example, you select dynamic control of pre-emphasis on a 4-lane
link, 3 bits are created for each lane, resulting in a 12-bit bus for pre-
emphasis control. The least-significant 3 bits (2 - 0) correspond to the
controls for lane 1. The most-significant bits (11 - 9) correspond to the
controls for lane 4. In the latter case, the settings for lane four would be
read from the tables as if bits [11..9] were bits [2..0], so that a pre-emphasis
setting of 1 for lane 4 would be achieved by placing 001 on bits [11..9].
3–47, 3–50, and 3–51.
MegaCore Function Version 1.1.0
Atlantic Interface
Atlantic Interface
OD
Transmit
Receive
, pre-emphasis, and equalization settings of each lane
Status
CLK
MegaCore
SerialLite
Variation
Function
SerialLite MegaCore Function User Guide
Transceiver
Figure
MRESET_N
Control
3–34) gives you access to the
Serial Interface
High-Speed
3–65