ACS8525AT Semtech, ACS8525AT Datasheet - Page 68

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ACS8525AT

Manufacturer Part Number
ACS8525AT
Description
Manufacturer
Semtech
Datasheet

Specifications of ACS8525AT

Lead Free Status / RoHS Status
Compliant
Address (hex):
Address (hex):
Revision 1.00/September 2007 © Semtech Corp.
ADVANCED COMMS & SENSING
Register Name
Register Name
freq_lim_ph_
loss
Bit No.
Bit No.
Bit 7
[7:5]
[3:0]
Bit 7
[6:0]
4
7
4B
4D
cnfg_registers_source_select
Description
Not used.
DPLL1_DPLL2_select
Bit to select between many of the registers
associated with DPLL1 or DPLL2 e.g. frequency
registers.
Not used.
cnfg_freq_lim_ph_loss
Description
freq_lim_ph_loss
Bit to enable the phase lost indication when the
DPLL hits its hard frequency limit as programmed in
Reg. 41 and Reg. 42 (cnfg_DPLL_freq_limit). This
results in the DPLL entering the phase lost state any
time the DPLL tracks to the extent of its hard limit.
Not used.
Bit 6
Bit 6
Bit 5
Bit 5
Description
DPLL1_DPLL2_
select
Description
Bit 4
Bit 4
FINAL
Page 68
(R/W) Register to select the
source of many of the registers.
(R/W) Register to enable the
phase lost indication when DPLL
hits its hard frequency limit.
Bit Value
Bit Value
Bit 3
Bit 3
0
1
0
1
-
-
-
Value Description
-
DPLL1 registers selected.
DPLL2 registers selected.
-
Value Description
Phase lost/locked determined normally.
Phase lost forced when DPLL tracks to hard limit.
-
Bit 2
Bit 2
ACS8525A LC/P
Default Value
Default Value
Bit 1
Bit 1
DATASHEET
www.semtech.com
0000 0000
1000 1110
Bit 0
Bit 0

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