ACS8525AT Semtech, ACS8525AT Datasheet - Page 81
ACS8525AT
Manufacturer Part Number
ACS8525AT
Description
Manufacturer
Semtech
Datasheet
1.ACS8525AT.pdf
(112 pages)
Specifications of ACS8525AT
Lead Free Status / RoHS Status
Compliant
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Address (hex):
Address (hex):
Address (hex):
Revision 1.00/September 2007 © Semtech Corp.
ADVANCED COMMS & SENSING
Register Name
Register Name
Register Name
Bit No.
Bit No.
Bit No.
Bit 7
[7:2]
[1:0]
Bit 7
[7:2]
[1:0]
Bit 7
[7:4]
66
67
69
cnfg_DPLL2_bw
Description
Not used.
DPLL2_bandwidth
Register to configure the bandwidth of DPLL2.
cnfg_DPLL1_locked_bw
Description
Not used.
DPLL1_locked_bandwidth
Register to configure the bandwidth of DPLL1 when
locked to an input reference. Reg. 3B Bit 7 is used
to control whether this bandwidth is used all of the
time or automatically switched to when phase
locked.
cnfg_DPLL1_acq_bw
Description
Not used.
Bit 6
Bit 6
Bit 6
Bit 5
Bit 5
Bit 5
Description
Description
Description
Bit 4
Bit 4
Bit 4
FINAL
Page 81
(R/W) Register to configure the
bandwidth of DPLL2.
(R/W) Register to configure the
bandwidth of DPLL1, when phase
locked to an input.
(R/W) Register to configure the
bandwidth of DPLL1, when not
phase locked to an input.
Bit Value
Bit Value
Bit Value
Bit 3
Bit 3
Bit 3
00
01
10
11
11
00
01
10
-
-
-
Value Description
-
DPLL2 18 Hz bandwidth.
DPLL2 35 Hz bandwidth.
DPLL2 70 Hz bandwidth.
Not used.
Value Description
-
DPLL1, 18 Hz locked bandwidth.
DPLL1, 35 Hz locked bandwidth.
DPLL1, 70 Hz locked bandwidth.
Not used.
Value Description
-
Bit 2
Bit 2
Bit 2
ACS8525A LC/P
Default Value
Default Value
Default Value
DPLL1_acquisition_bandwidth
DPLL1_locked_bandwidth
Bit 1
Bit 1
Bit 1
DPLL2_bandwidth
DATASHEET
www.semtech.com
0000 0000
0001 0000
0001 0001
Bit 0
Bit 0
Bit 0
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