MPC8309VMAHFCA Freescale Semiconductor, MPC8309VMAHFCA Datasheet - Page 2

• Manufacturer Part Number: MPC8309VMAHFCA
• Description: 417/333/233 MP Std Tmp
• Manufacturer: Freescale Semiconductor

Specifications of MPC8309VMAHFCA

• Processor Series: MPC8309
• Core: e300c3
• Data Bus Width: 32 bit
• Data Ram Size: 512 MB
• Interface Type: USB, CAN, UART, PCI
• Maximum Clock Frequency: 417 MHz
• Number Of Programmable I/os: 56
• Operating Supply Voltage: - 0.3 V to + 1.26 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: 0 C to + 105 C
• Processor To Be Evaluated: MPC8309
• Supply Current (max): 5 uA
• Lead Free Status / Rohs Status: Details

Overview
1
The MPC8309 incorporates the e300c3 (MPC603e-based) core built on Power Architecture® technology,
which includes 16 Kbytes of each L1 instruction and data caches, dual integer units, and on-chip memory
management units (MMUs). The MPC8309 also includes a 32-bit PCI controller, two DMA engines and
a 16/32-bit DDR2 memory controller with 8-bit ECC.
A new communications complex based on QUICC Engine technology forms the heart of the networking
capability of the MPC8309. The QUICC Engine block contains several peripheral controllers and a 32-bit
RISC controller. Protocol support is provided by the main workhorses of the device—the unified
communication controllers (UCCs). A block diagram of the MPC8309 is shown in the following figure.
Each of the five UCCs can support a variety of communication protocols such as 10/100 Mbps MII/RMII
Ethernet, HDLC and TDM.
In summary, the MPC8309 provides users with a highly integrated, fully programmable communications
processor. This helps to ensure that a low-cost system solution can be quickly developed and offers
flexibility to accommodate new standards and evolving system requirements.
2
2x TDM Ports
2x DUART
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1
Timers
2x HDLC
GPIO
RTC
SPI
I2C
Overview
Generators
Baud Rate
QUICC Engine™ Block
Controller
Interrupt
Single 32-bit RISC CP Serial DMA
2 RMII/MII
Accelerators
Time Slot Assigner
Serial Interface
16 KB Multi-User RAM
48 KB Instruction RAM
2x IEEE 1588
I-Cache
1 RMII/MII
16-KB
e300c3 Core with Power
Figure 1. MPC8309 Block Diagram
Management
FPU
D-Cache
16-KB
4 FlexCAN
Engine 1
DMA
Host/Device/OTG
USB 2.0 HS
Sequencer
ULPI
IO
PCI Controller
eSDHC
Enhanced
Local Bus
Freescale Semiconductor
Engine 2
DMA
Controller
DDR2