EP2SGX30DF780C5N Altera, EP2SGX30DF780C5N Datasheet - Page 214

IC STRATIX II GX 30K 780-FBGA

EP2SGX30DF780C5N

Manufacturer Part Number
EP2SGX30DF780C5N
Description
IC STRATIX II GX 30K 780-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX30DF780C5N

Number Of Logic Elements/cells
33880
Number Of Labs/clbs
1694
Total Ram Bits
1369728
Number Of I /o
361
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
780-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
33880
# I/os (max)
361
Frequency (max)
609.76MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
33880
Ram Bits
1369728
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1754

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2SGX30DF780C5N
Manufacturer:
ALTERA
0
Part Number:
EP2SGX30DF780C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Operating Conditions
4–44
Stratix II GX Device Handbook, Volume 1
Notes to
(1)
(2)
Notes to
(1)
(2)
Notes to
(1)
(2)
V
V
V
V
V
V
V
V
V
V
V
Table 4–24. LVTTL Specifications (Part 2 of 2)
Table 4–25. LVCMOS Specifications
Table 4–26. 2.5-V I/O Specifications
OL
CCIO
IH
IL
OH
OL
CCIO
IH
IL
OH
OL
Symbol
Symbol
Symbol
Stratix II GX devices comply to the narrow range for the supply voltage as specified in the EIA/JEDEC Standard,
JESD8-B.
This specification is supported across all the programmable drive strength settings available for this I/O standard
as shown in the
Stratix II GX devices comply to the narrow range for the supply voltage as specified in the EIA/JEDEC Standard,
JESD8-B.
This specification is supported across all the programmable drive strength available for this I/O standard as shown
in
The Stratix II GX device V
the EIA/JEDEC standard.
This specification is supported across all the programmable drive settings available for this I/O standard as shown
in
(1)
(1)
Stratix II GX Architecture
Stratix II GX Architecture
Table
Table
Table
Low-level output voltage
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
4–24:
4–25:
4–26:
Stratix II GX Architecture
Parameter
Parameter
Parameter
CCIO
chapter in volume 1 of the Stratix II GX Device Handbook.
chapter in volume 1 of the Stratix II GX Device Handbook.
voltage level support of 2.5 to 5% is narrower than defined in the Normal Range of
I
Note (1)
V
V
I
I
chapter in volume 1 of the Stratix II GX Device Handbook.
OL
OH
OL
CCIO
CCIO
= 4 mA
= 1 mA
= –1 mA
= 3.0, I
= 3.0, I
Conditions
Conditions
Conditions
(2)
(2)
OH
(2)
OL
= –0.1 mA
= 0.1 mA
(2)
(2)
V
Minimum
Minimum
Minimum
CCIO
3.135
2.375
–0.3
–0.3
1.7
1.7
2.0
– 0.2
Altera Corporation
Maximum
Maximum
Maximum
3.465
2.625
0.45
4.0
0.8
0.2
4.0
0.7
0.4
June 2009
Unit
Unit
Unit
V
V
V
V
V
V
V
V
V
V
V

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