EP2SGX30DF780C5N Altera, EP2SGX30DF780C5N Datasheet - Page 272

• Manufacturer Part Number: EP2SGX30DF780C5N
• Description: IC STRATIX II GX 30K 780-FBGA
• Manufacturer: Altera
• Series: Stratix® II GXr

Specifications of EP2SGX30DF780C5N

• Number Of Logic Elements/cells: 33880
• Number Of Labs/clbs: 1694
• Total Ram Bits: 1369728
• Number Of I /o: 361
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 780-FBGA
• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 33880
• # I/os (max): 361
• Frequency (max): 609.76MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 33880
• Ram Bits: 1369728
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1754

(1)
(2)
Class I
Class II
Class I
Class II
HSTL Class I
HSTL Class II
HSTL Class I
HSTL Class I I
Differential SSTL-18
Differential SSTL-18
1.8-V HSTL CLass I
PCI
PCI-X
Differential SSTL-2
Differential SSTL-2
1.8-V differential
1.8-V differential
1.5-V differential
1.5-V differential
HyperTransport
LVPECL (1),
LVDS
Table 4–90. Stratix II GX Maximum Input Clock Rate for Dedicated Clock Pins (Part 2 of 2)
I/O Standard
LVPECL is only supported on column clock pins.
The first set of numbers refers to the HIO dedicated clock pins. The second set of numbers refers to the VIO
dedicated clock pins.
(1)
(2)
(1)
-3 Speed Grade
500
500
500
500
500
500
500
500
500
500
500
717
450
717
450
717
450
-4 Speed Grade
500
500
500
500
500
500
500
500
500
500
500
717
450
717
450
717
450
-5 Speed Grade
500
400
400
500
500
500
500
500
500
500
500
640
400
640
400
640
400
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz