EP3C16F484C7N Altera, EP3C16F484C7N Datasheet - Page 218

• Manufacturer Part Number: EP3C16F484C7N
• Description: IC CYCLONE III FPGA 16K 484FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C16F484C7N

• Number Of Logic Elements/cells: 15408
• Number Of Labs/clbs: 963
• Total Ram Bits: 516096
• Number Of I /o: 346
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 15408
• # I/os (max): 346
• Frequency (max): 437.5MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 15408
• Ram Bits: 516096
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• No. Of Logic Blocks: 963
• Family Type: Cyclone III
• No. Of I/o's: 346
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 437.5MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2473

9–58
Cyclone III Device Handbook, Volume 1
Figure 9–29. Combining JTAG and AS Configuration Schemes
Notes to
(1) Connect these pull-up resistors to the V
(2) Power up the V
(3) Pin 6 of the header is a V
(4) The MSEL pin settings vary for different configuration voltage standards and POR time. To connect MSEL[3..0]for
(5) These are dual-purpose I/O pins. This nCSO pin functions as the FLASH_NCE pin in AP mode. The ASDO pin
(6) Power up V
(7) You must place the diodes and capacitors as close as possible to the Cyclone III device family. For effective voltage
device. For this value, refer to the
this pin is a no connect. In USB-Blaster and ByteBlaster II, this pin is connected to nCE when it is used for AS
programming, otherwise it is a no connect.
AS configuration schemes, refer to
functions as the DATA[1] pin in other AP and FPP modes.
V
cable. The MasterBlaster cable can receive power from either 5.0- or 3.3-V circuit boards, DC power supply, or 5.0 V
from the USB cable. For this value, refer to the
clamping, Altera recommends using the Schottky diode, which has a relatively lower forward diode voltage (VF) than
the switching and Zener diodes. For more information about the interface guidelines using Schottky diodes, refer to
AN 523: Cyclone III Configuration Interface Guidelines with EPCS Devices.
CCA
10-Pin Male Header
Download Cable
. Third-party programmers must switch to 2.5 V. Pin 4 of the header is a V
Figure
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration
(AS Mode)
Pin 1
Device
Serial
CC
DCLK
DATA
ASDI
9–29:
nCS
of the ByteBlaster II, USB-Blaster, ByteBlasterMV, or Ethernet Blaster cable with a 2.5- V supply from
3.3 V (2)
CC
10 kΩ
10kΩ
of the ByteBlaster II, USB-Blaster, or Ethernet Blaster cable with the 3.3-V supply.
V
CCIO
GND
IO
(1)
10 kΩ
reference voltage for the MasterBlaster output driver. V
V
10 pf
(7)
CCIO
(7)
GND
MasterBlaster Serial/USB Communications Cable User
3.3 V
(1)
10 kΩ
Table 9–7 on page
GND
3.3 V
V
CCIO
CCIO
GND
3.3 V
10 pf
supply of the bank in which the pin resides.
(1)
10 pf
3.3 V
MasterBlaster Serial/USB Communications Cable User
GND
Cyclone III Device Family
nSTATUS
CONF_DONE
nCONFIG
nCE
DATA[0]
DCLK
nCSO (5)
ASDO (5)
9–11. Connect the MSEL pins directly to V
10 pf
MSEL [3..0]
nCEO
TCK
TDO
TMS
TDI
© December 2009 Altera Corporation
N.C.
(4)
CC
V
power supply for the MasterBlaster
CCA
IO
must match the V
10 kΩ
V
1 kΩ
CCA
Guide. In ByteBlasterMV,
10 kΩ
GND
Configuration Features
10-Pin Male Header
Pin 1
Download Cable
CCA
(JTAG Mode)
(top view)
or GND.
Guide.
CCA
V
of the
CCA
V
IO
(6)
(3)