ENC424J600-I/ML Microchip Technology, ENC424J600-I/ML Datasheet - Page 12

• Manufacturer Part Number: ENC424J600-I/ML
• Description: IC ETHERNET CTRLR W/SPI 44-QFN
• Manufacturer: Microchip Technology

Specifications of ENC424J600-I/ML

• Package / Case: 44-QFN
• Controller Type: Ethernet Controller
• Interface: SPI
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 96mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 117 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164132 - BOARD DAUGHTER PICTAIL ETHERNET
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ENC424J600/624J600
2.3
2.3.1
To reduce on-die noise levels and provide for the
high-current demands of Ethernet, there are many
power pins on ENC424J600/624J600 devices:
• V
• V
• V
• V
• V
Each V
ceramic bypass capacitor placed as close to the pins as
possible. For best EMI emission suppression, other
smaller capacitors, such as 0.001 F, should be placed
immediately across V
All V
nected to the same 3.3V ±10% power source. Similarly,
all V
to the same ground node. If a ground connection
appears on two pins (e.g., V
do not allow either to float. In addition, it is
recommended that the exposed bottom metal pad on
the 44-pin QFN package be tied to V
Placing ferrite beads or inductors between any two of
the supply pins (e.g., between V
not recommended. However, it is acceptable to isolate
all of the V
ply through a single ferrite bead or inductor, if desired
for supply noise suppression reasons. Such isolation is
generally not necessary.
2.3.2
Most of the device’s digital logic operates at a nominal
1.8V. This voltage is supplied by an on-chip voltage
regulator, which generates the digital supply voltage
from the V
required is an external filter capacitor, connected from
the V
of at least 10 F is recommended.
The capacitor must also have a relatively low Equiva-
lent Series Resistance (ESR). It is recommended that
a low-ESR capacitor (ceramic, tantalum or similar)
should be used and high-ESR capacitors (such as
aluminum electrolytic) should be avoided.
The internal regulator is not designed to drive external
loads; therefore, do not attach other circuitry to V
DS39935C-page 10
DD
DDOSC
DDPLL
DDRX
DDTX
SS
CAP
DD
and V
DD
supply references must be externally connected
power supply pins must be externally con-
Voltage and Bias Pin
and V
pin to ground, as shown in Figure 2-3. A value
and V
and V
and V
DD
and V
V
V
DD
SS
DD
CAP
supplies from the main circuit power sup-
SSTX
SSRX
SSPLL
SS
SSOSC
rail. The only external component
AND V
PIN
pin pair above should have a 0.1 F
DDTX
SS
/V
PINS
SSTX
SSTX
DDOSC
), connect both pins;
and V
SS
.
DDPLL
and V
/V
DDRX
SSPLL
CAP
) is
.
.
FIGURE 2-3:
2.3.3
The internal analog circuitry in the PHY module
requires that an external 12.4 kΩ, 1% resistor be
attached from RBIAS to ground, as shown in
Figure 2-4. The resistor influences the TPOUT+/-
signal amplitude. The RBIAS resistor should be placed
as close as possible to the chip with no immediately
adjacent signal traces in order to prevent noise
capacitively coupling into the pin and affecting the
transmit behavior. It is recommended that the resistor
be a surface mount type.
FIGURE 2-4:
0.1 F
3.3V
ENCX24J600
RBIAS PIN
10 F
PHY
RBIAS
V
RBIAS RESISTOR
 2010 Microchip Technology Inc.
CAP
V
V
V
DD
CAP
SS
Regulator
CONNECTIONS
ENCX24J600
12.4k1%
Core, RAM,
I/O, PHY
+3.3V
+1.8V
MAC