PCX107AVZFU100LC E2V, PCX107AVZFU100LC Datasheet - Page 36

• Manufacturer Part Number: PCX107AVZFU100LC
• Description: IC PCI BRIDGE MEM CTRLR 503PBGA
• Manufacturer: E2V

Specifications of PCX107AVZFU100LC

• Controller Type: PCI Controller
• Interface: PCI
• Voltage - Supply: 2.375 V ~ 2.625 V
• Operating Temperature: -40°C ~ 110°C
• Mounting Type: Surface Mount
• Package / Case: 503-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -

7.2.7
Table 7-11.
Notes:
Figure 7-14. EPIC Serial Interrupt Mode Output Timing Diagram
Figure 7-15. EPIC Serial Interrupt Mode Input Timing Diagram
36
Num
1
2
3
4
5
6
7
1. See the PC107A User’s Manual for a description of the EPIC Interrupt Control Register (EICR) describing S_CLK frequency
2. S_RST, S_FRAME, and S_INT shown in
3. The sys_logic_clk waveform is the clocking signal of the internal peripheral logic from the output of the peripheral logic PLL;
sys_logic_clk3
Characteristics
S_CLK Frequency
S_CLK Duty Cycle
S_CLK Output Valid Time
Output Hold Time
S_FRAME, S_RST Output Valid Time
S_INT Input Setup Time to S_CLK
S_INT Inputs Invalid (Hold Time) to S_CLK
PC107A
EPIC Serial Interrupt Mode AC Timing Specifications
programming.
S_CLK and do not describe functional relationships between S_RST, S_FRAME, and S_INT. See the PC107A User’s Man-
ual for a complete description of the functional relationships between these signals.
sys_logic_clk is the same as SDRAM_SYNC_IN when the SDRAM_SYNC_OUT to SDRAM_SYNC_IN feedback loop is
implemented and the DLL is locked. See the PC107A User’s Manual for a complete clocking description.
S_FRAME
S_CLK
EPIC Serial Interrupt Mode AC Timing Specifications
S_CLK
S_INT
S_RST
Table 7-11
At recommended operating conditions (see
VM
VM
provides the EPIC serial interrupt mode AC timing specifications for the PC107A.
3
5
Figure 7-14
1 sys_logic_clk period + 2
1/14 SDRAM_SYNC_IN
VM
and
VM
Min
40
–
0
–
–
4
Figure 7-15
VM
6
Table 5-2 on page
depict timing relationships to sys_logic_clk and
1 sys_logic_clk period + 6
VM
1/2 SDRAM_SYNC_IN
VM
4
7
Max
12) with
60
VM
6
–
–
0
LV
DD
= 3.3
MHz
Unit
2137D–HIREL–08/05
nS
nS
nS
nS
nS
±
%
0.3V
Notes
(1)
(2)
(2)
(2)