ISP1161ABD-S ST-Ericsson Inc, ISP1161ABD-S Datasheet - Page 107

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ISP1161ABD-S

Manufacturer Part Number
ISP1161ABD-S
Description
IC USB HOST CTRL FULL-SPD 64LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1161ABD-S

Controller Type
USB 2.0 Controller
Interface
Parallel
Voltage - Supply
3.3V, 5V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1161ABD-S
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Philips Semiconductors
Table 106: DcChipID register: bit allocation
9397 750 13962
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
15
R
R
0
7
0
13.3.5 Read Chip ID (R: B5H)
13.3.6 Read Interrupt register (R: C0H)
Table 105: Example of DcFrameNumber register access
This command reads the chip identification code and hardware version number. The
firmware must check this information to determine the supported functions and
features. This command accesses the DcChipID register, which is shown in
Table
Code (Hex): B5 — read chip ID
Transaction — read 1 word
Table 107: DcChipID register: bit description
This command indicates the sources of interrupts as stored in the 4-byte DcInterrupt
register. Each individual endpoint has its own interrupt bit. The bit allocation of the
DcInterrupt register is shown in
bus status in the interrupt service routine. Interrupts are enabled via the Interrupt
Enable register, see
Remark: While reading the DcInterrupt register, it is recommended that both 2 byte
words are read completely.
Code (Hex): C0 — read interrupt register
Transaction — read 2 words
Remark: For details on interrupt control, see
A0
1
0
Bit
15 to 8
7 to 0
14
R
R
1
6
0
106.
Phase
command
data
Symbol
CHIPIDH[7:0]
CHIPIDL[7:0]
13
R
R
1
5
1
Rev. 03 — 23 December 2004
Section
Bus lines
D[7:0]
D[15:8]
D[15:0]
Description
chip ID code (61H)
silicon version (22H)
Full-speed USB single-chip host and device controller
12
R
R
0
4
0
13.1.5.
CHIPIDH[7:0]
CHIPIDL[7:0]
Table
Word #
-
-
0
108. Bit BUSTATUS is used to verify the current
11
R
R
0
3
0
Section
Description
command code (B4H)
ignored
frame number
10
R
R
0
2
0
8.6.3.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1161A
R
R
9
0
1
1
106 of 134
R
R
8
1
0
0

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