ISP1161ABD-S ST-Ericsson Inc, ISP1161ABD-S Datasheet - Page 56

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ISP1161ABD-S

Manufacturer Part Number
ISP1161ABD-S
Description
IC USB HOST CTRL FULL-SPD 64LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1161ABD-S

Controller Type
USB 2.0 Controller
Interface
Parallel
Voltage - Supply
3.3V, 5V
Current - Supply
47mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1161ABD-S
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
Philips Semiconductors
9397 750 13962
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
R/W
R/W
15
0
7
0
10.3 HC Root Hub registers
Table 27:
All registers included in this partition are dedicated to the USB Root Hub, which is an
integral part of the HC although it is functionally a separate entity. The Host Controller
Driver (HCD) emulates USBD accesses to the Root Hub via a register interface. The
HCD maintains many USB-defined hub features that are not required to be supported
in hardware. For example, the Hub’s Device, Configuration, Interface, Endpoint
Descriptors, as well as some static fields of the Class Descriptor, are maintained only
in the HCD. The HCD also maintains and decodes the Root Hub’s device address as
well as other minor operations more suited for software than for hardware.
The Root Hub registers were developed to match the bit organization and operation
of typical hubs found in the system.
Four 32-bit registers have been defined:
Each register is read and written as a DWORD. These registers are only written
during initialization to correspond with the system implementation. The
HcRhDescriptorA and HcRhDescriptorB registers are writeable regardless of the
HC’s USB states. HcRhStatus and HcRhPortStatus are writeable during the
USBOperational state only.
Bit
31 to 11
10 to 0
R/W
R/W
HcRhDescriptorA
HcRhDescriptorB
HcRhStatus
HcRhPortStatus[1:NDP]
14
0
6
0
HcLSThreshold register: bit description
Symbol
LST[10:0]
reserved
R/W
R/W
13
0
5
1
Rev. 03 — 23 December 2004
Description
reserved
LSThreshold: Contains a value that is compared to the
FrameRemaining field before a low-speed transaction is initiated.
The transaction is started only if FrameRemaining ≥ this field. The
value is calculated by the HCD, which considers transmission and
set-up overhead. Default value: 1576 (628H)
Full-speed USB single-chip host and device controller
R/W
R/W
12
0
4
0
LST[7:0]
R/W
R/W
11
0
3
1
R/W
R/W
10
1
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
LST[10:8]
ISP1161A
R/W
R/W
9
1
1
0
R/W
R/W
55 of 134
8
0
0
0

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