ISP1161ABD-S ST-Ericsson Inc, ISP1161ABD-S Datasheet - Page 83

• Manufacturer Part Number: ISP1161ABD-S
• Description: IC USB HOST CTRL FULL-SPD 64LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161ABD-S

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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11.4.1 Suspend conditions
11.4 Suspend and resume
The ISP1161A DC detects a USB suspend status when a constant idle state is
present on the USB bus for more than 3 ms.
The bus-powered devices that are suspended must not consume more than 500 µA
of current. This is achieved by shutting down power to system components or
supplying them with a reduced voltage.
The steps leading up to suspend status are as follows:
Figure 38
1. On detecting a wakeup-to-suspend transition, the ISP1161A DC sets
2. When the firmware detects a suspend condition, it must prepare all system
3. In the interrupt service routine, the firmware must check the current status of the
4. To meet the suspend current requirements for a bus-powered device, the internal
5. When the firmware has set and cleared bit GOSUSP in the DcMode register, the
bit SUSPND in the DcInterrupt register. This will generate an interrupt if
bit IESUSP in the DcInterruptEnable register is set.
components for the suspend state:
USB bus. When bit BUSTATUS in the DcInterrupt register is logic 0, the USB bus
has left the suspend mode and the process must be aborted. Otherwise, the next
step can be executed.
clocks must be switched off by clearing bit CLKRUN in the
DcHardwareConfiguration register.
ISP1161A enters the suspend state. In powered-off application, the ISP1161A
DC asserts output SUSPEND and switches off the internal clocks after 2 ms.
a. All signals connected to the ISP1161A DC must enter appropriate states to
b. All input pins of the ISP1161A DC must have a CMOS LOW or HIGH level.
meet the power consumption requirements of the suspend state.
shows a typical timing diagram.
Rev. 03 — 23 December 2004
Full-speed USB single-chip host and device controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1161A
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