DSPIC30F5015-30I/PT Microchip Technology Inc., DSPIC30F5015-30I/PT Datasheet - Page 133

• Manufacturer Part Number: DSPIC30F5015-30I/PT
• Description: DSP, 16-Bit, 66 KB Flash, 2KB RAM, 52 I/O, TQFP-64
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F5015-30I/PT

• A/d Inputs: 16-Channels, 10-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 52
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 52
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 64-pin TQFP
• Programmable Memory: 66K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 19-1:
C1TX1B2
C1TX1B3
C1TX1B4
C1TX1CON
C1TX0SID
C1TX0EID
C1TX0DLC
C1TX0B1
C1TX0B2
C1TX0B3
C1TX0B4
C1TX0CON
C1RX1SID
C1RX1EID
C1RX1DLC
C1RX1B1
C1RX1B2
C1RX1B3
C1RX1B4
C1RX1CON
C1RX0SID
C1RX0EID
C1RX0DLC
C1RX0B1
C1RX0B2
C1RX0B3
C1RX0B4
C1RX0CON
C1CTRL
C1CFG1
C1CFG2
C1INTF
C1INTE
C1EC
Legend:
Note:
SFR Name
u = uninitialized bit
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Addr.
035C
036C
037C
038C
0358
035A
035E
0360
0362
0364
0366
0368
036A
036E
0370
0372
0374
0376
0378
037A
037E
0380
0382
0384
0386
0388
038A
038E
0390
0392
0394
0396
0398
039A
CAN1 REGISTER MAP (CONTINUED)
CANCAP
RX0OVR
Transmit Buffer 0 Extended Identifier<17:14>
Bit 15
—
—
—
—
—
—
—
—
—
—
—
Transmit Buffer 0 Standard Identifier<10:6>
Transmit Buffer 0 Extended Identifier<5:0>
Receive Buffer 1 Extended Identifier<5:0>
Receive Buffer 0 Extended Identifier<5:0>
RX1OVR
WAKFIL
Bit 14
—
—
—
—
—
—
—
—
—
—
—
CSIDLE
Bit 13
TXBO
Transmit Error Count Register
—
—
—
—
—
—
—
—
—
—
—
Transmit Buffer 1 Byte 3
Transmit Buffer 1 Byte 5
Transmit Buffer 1 Byte 7
Transmit Buffer 0 Byte 1
Transmit Buffer 0 Byte 3
Transmit Buffer 0 Byte 5
Transmit Buffer 0 Byte 7
Receive Buffer 1 Byte 1
Receive Buffer 1 Byte 3
Receive Buffer 1 Byte 5
Receive Buffer 1 Byte 7
Receive Buffer 0 Byte 1
Receive Buffer 0 Byte 3
Receive Buffer 0 Byte 5
Receive Buffer 0 Byte 7
Bit 12
TXEP
ABAT
—
—
—
—
—
—
—
—
—
CANCKS
RXEP
Bit 11
—
—
—
—
—
—
—
—
Bit 10
TXWA
—
—
—
—
—
—
—
—
R
SEG2PH<2:0>
REQOP<2:0>
RXWAR EWARN
RXRTR RXRB1
RXRTR RXRB1
TXRTR
Bit 9
—
—
—
—
—
—
—
—
Receive Buffer 1 Standard Identifier<10:0>
Receive Buffer 0 Standard Identifier<10:0>
TXRB1
Bit 8
—
—
—
—
—
—
—
—
Receive Buffer 1 Extended Identifier<17:6>
Receive Buffer 0 Extended Identifier<17:6>
SEG2PHTS
RXFUL
RXFUL
TXRB0
IVRIF
IVRIE
Bit 7
—
—
—
—
SJW<1:0>
OPMODE<2:0>
Transmit Buffer 0 Standard Identifier<5:0>
TXABT TXLARB
TXABT TXLARB
WAKIF
WAKIE
Bit 6
SAM
—
—
—
—
Transmit Buffer 0 Extended Identifier<13:6>
ERRIF
ERRIE
Bit 5
Receive Error Count Register
—
—
—
—
Transmit Buffer 1 Byte 2
Transmit Buffer 1 Byte 4
Transmit Buffer 1 Byte 6
Transmit Buffer 0 Byte 0
Transmit Buffer 0 Byte 2
Transmit Buffer 0 Byte 4
Transmit Buffer 0 Byte 6
Receive Buffer 1 Byte 0
Receive Buffer 1 Byte 2
Receive Buffer 1 Byte 4
Receive Buffer 1 Byte 6
Receive Buffer 0 Byte 0
Receive Buffer 0 Byte 2
Receive Buffer 0 Byte 4
Receive Buffer 0 Byte 6
DLC<3:0>
SEG1PH<2:0>
TXERR
TXERR
RXRB0
RXRB0
TX2IF
TX2IE
Bit 4
—
—
—
RXRTRRO
RXRTRRO DBEN JTOFF FILHIT0
TXREQ
TXREQ
TX1IF
TX1IE
BRP<5:0>
Bit 3
ICODE<2:0>
TX0IF RX1IF
TX0IE RX1E
DLC<3:0>
DLC<3:0>
Bit 2
—
—
—
PRSEG<2:0>
FILHIT<2:0>
Bit 1
SRR
SRR
SRR
TXPRI<1:0>
TXPRI<1:0>
—
RXIDE
RXIDE
TXIDE
RX0IF
RX0IE
Bit 0
—
—
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
0000 0000 0000 0000
uuuu u000 uuuu uuuu
uuuu 0000 uuuu uuuu
uuuu uuuu uuuu u000
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
0000 0000 0000 0000
000u uuuu uuuu uuuu
0000 uuuu uuuu uuuu
uuuu uuuu 000u uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
0000 0000 0000 0000
000u uuuu uuuu uuuu
0000 uuuu uuuu uuuu
uuuu uuuu 000u uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
0000 0000 0000 0000
0000 0100 1000 0000
0000 0000 0000 0000
0u00 0uuu uuuu uuuu
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Reset State