DSPIC30F5015-30I/PT Microchip Technology Inc., DSPIC30F5015-30I/PT Datasheet - Page 224

• Manufacturer Part Number: DSPIC30F5015-30I/PT
• Description: DSP, 16-Bit, 66 KB Flash, 2KB RAM, 52 I/O, TQFP-64
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F5015-30I/PT

• A/d Inputs: 16-Channels, 10-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 52
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 52
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 64-pin TQFP
• Programmable Memory: 66K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

dsPIC30F5015/5016
Q
Quadrature Encoder Interface (QEI) .................................. 87
R
Reader Response ............................................................ 226
Reset ........................................................................ 133, 139
Reset Sequence ................................................................. 43
Resets
Revision History ............................................................... 217
Run-Time Self-Programming (RTSP) ................................ 49
S
Simple Capture Event Mode
Simple Output Compare Match Mode ................................ 84
Simple PWM Mode ............................................................ 84
Software Simulator (MPLAB SIM) .................................... 170
Software Stack Pointer, Frame Pointer .............................. 16
DS70149C-page 222
Operation During CPU Sleep Mode ......................... 101
Output and Polarity Control ...................................... 100
Output Override ......................................................... 99
Period ......................................................................... 96
Single-Pulse Operation .............................................. 99
Special Event Trigger ............................................... 101
Time Base .................................................................. 95
Update Lockout ........................................................ 101
Interrupts .................................................................... 90
Logic .......................................................................... 88
Operation During CPU Idle Mode .............................. 89
Operation During CPU Sleep Mode ........................... 89
Register Map .............................................................. 91
Timer Operation During CPU Idle Mode .................... 90
Timer Operation During CPU Sleep Mode ................. 89
Reset Sources ........................................................... 43
BOR, Programmable ................................................ 141
POR ......................................................................... 140
POR with Long Crystal Start-up Time ...................... 141
POR, Operating without FSCM and PWRT ............. 141
Control Registers ....................................................... 50
Operation ................................................................... 50
Capture Buffer Operation ........................................... 80
Capture Prescaler ...................................................... 79
Hall Sensor Mode ...................................................... 80
Timer2 and Timer3 Selection Mode ........................... 80
Input Pin Fault Protection ........................................... 84
Period ......................................................................... 85
CALL Stack Frame ..................................................... 31
Output Pin Control ........................................... 100
Complementary Output Mode ............................ 99
Synchronization ................................................. 99
Postscaler ........................................................ 101
Continuous Up/Down Counting Modes .............. 95
Double Update Mode ......................................... 96
Free-Running Mode ........................................... 95
Postscaler .......................................................... 96
Prescaler ............................................................ 96
Single-Shot Mode .............................................. 95
NVMADR ........................................................... 50
NVMADRU ......................................................... 50
NVMCON ........................................................... 50
NVMKEY ............................................................ 50
SPI Module ...................................................................... 103
STATUS Register .............................................................. 16
Symbols Used in Opcode Descriptions ........................... 162
System Integration ........................................................... 133
T
Timer1 Module ................................................................... 65
Timer2/3 Module ................................................................ 69
Timer4/5 Module ................................................................ 75
Timing Diagrams
Framed SPI Support ................................................ 105
Operating Function Description ............................... 103
Operation During CPU Idle Mode ............................ 105
Operation During CPU Sleep Mode ......................... 105
SDOx Disable .......................................................... 103
Slave Select Synchronization .................................. 105
SPI1 Register Map ................................................... 106
SPI2 Register Map ................................................... 106
Word and Byte Communication ............................... 103
Register Map ........................................................... 147
Gate Operation .......................................................... 66
Interrupt ..................................................................... 67
Operation During Sleep Mode ................................... 66
Prescaler ................................................................... 66
Real-Time Clock ........................................................ 67
Register Map ............................................................. 68
16-bit Asynchronous Counter Mode .......................... 65
16-bit Synchronous Counter Mode ............................ 65
16-bit Timer Mode ...................................................... 65
ADC Event Trigger ..................................................... 72
Gate Operation .......................................................... 72
Interrupt ..................................................................... 72
Operation During Sleep Mode ................................... 72
Register Map ............................................................. 73
Timer Prescaler ......................................................... 72
16-bit Mode ................................................................ 69
32-bit Synchronous Counter Mode ............................ 69
32-bit Timer Mode ...................................................... 69
Register Map ............................................................. 77
Band Gap Start-up Time .......................................... 189
Brown-out Reset ...................................................... 180
CAN Bit .................................................................... 128
CAN Module I/O ....................................................... 207
Center-Aligned PWM ................................................. 97
CLKOUT and I/O ..................................................... 187
Dead-Time ................................................................. 99
Edge-Aligned PWM ................................................... 96
External Clock .......................................................... 182
Input Capture (CAPx) .............................................. 193
I
I
I
I
Motor Control PWM Module .................................... 195
Motor Control PWM Module Fault ........................... 195
OC/PWM Module ..................................................... 194
Output Compare (OCx) ............................................ 193
PWM Output .............................................................. 85
QEA/QEB Input Characteristics ............................... 196
QEI Module Index Pulse .......................................... 197
Reset, Watchdog Timer, Oscillator Start-up Timer
SPI Master Mode (CKE = 0) .................................... 198
SPI Master Mode (CKE = 1) .................................... 199
2
2
2
2
C Bus Data (Master Mode) ................................... 203
C Bus Data (Slave Mode) ..................................... 205
C Bus Start/Stop Bits (Master Mode) .................... 203
C Bus Start/Stop Bits (Slave Mode) ...................... 205
Interrupts ........................................................... 67
Oscillator Operation ........................................... 67
and Power-up Timer ........................................ 188
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