DSPIC30F5015-30I/PT Microchip Technology Inc., DSPIC30F5015-30I/PT Datasheet - Page 221

• Manufacturer Part Number: DSPIC30F5015-30I/PT
• Description: DSP, 16-Bit, 66 KB Flash, 2KB RAM, 52 I/O, TQFP-64
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F5015-30I/PT

• A/d Inputs: 16-Channels, 10-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 52
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 52
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 64-pin TQFP
• Programmable Memory: 66K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

INDEX
A
A/D
AC
AC Characteristics ........................................................... 182
Address Generator Units ................................................... 35
Alternate Vector Table (AIVT) ............................................ 45
Alternate 16-bit Timer/Counter ........................................... 89
Assembler
Automatic Clock Stretch ................................................... 110
B
Barrel Shifter ...................................................................... 22
Bit-Reversed Addressing ................................................... 38
Block Diagrams
© 2007 Microchip Technology Inc.
Aborting a Conversion ............................................. 152
Acquisition Requirements ........................................ 156
ADCHS .................................................................... 149
ADCON1 .................................................................. 149
ADCON2 .................................................................. 149
ADCON3 .................................................................. 149
ADCSSL ................................................................... 149
ADPCFG .................................................................. 149
Configuring Analog Port Pins ................................... 158
Connection Considerations ...................................... 158
Conversion Operation .............................................. 151
Effects of a Reset ..................................................... 157
Operation During CPU Idle Mode ............................ 157
Operation During CPU Sleep Mode ......................... 157
Output Formats ........................................................ 157
Power-Down Modes ................................................. 157
Programming the Start of Conversion Trigger ......... 152
Register Map ............................................................ 159
Result Buffer ............................................................ 151
Selecting the Conversion Clock ............................... 152
Selecting the Conversion Sequence ........................ 151
Temperature and Voltage Specifications ................. 182
Internal FRC Jitter, Accuracy and Drift .................... 186
Internal LPRC Accuracy ........................................... 186
Load Conditions ....................................................... 182
PLL Jitter .................................................................. 184
MPASM Assembler .................................................. 170
During 10-bit Addressing (STREN = 1) .................... 110
During 7-bit Addressing (STREN = 1) ...................... 110
Receive Mode .......................................................... 110
Transmit Mode ......................................................... 110
Example ..................................................................... 38
Implementation .......................................................... 38
Modifier Values for XBREV Register ......................... 39
Sequence Table (16-Entry) ........................................ 39
CAN Buffers and Protocol Engine ............................ 124
Dedicated Port Structure ............................................ 59
DSP Engine ............................................................... 19
dsPIC30F5015 ............................................................. 8
dsPIC30F5016 ........................................................... 11
External Power-on Reset Circuit .............................. 142
Input Capture Mode ................................................... 79
I
Oscillator System ..................................................... 135
Output Compare Mode .............................................. 83
Programmer’s Model .................................................. 17
PWM Module ............................................................. 94
Quadrature Encoder Interface ................................... 87
Reset System ........................................................... 139
2
C ............................................................................ 108
BOR. See Brown-out Reset.
Brown-out Reset (BOR) ................................................... 133
C
C Compilers
CAN
CAN Module .................................................................... 123
Code Examples
Code Protection ............................................................... 133
Configuring Analog Port Pins ............................................. 60
dsPIC30F5015/5016
Shared Port Structure ................................................ 60
SPI ........................................................................... 104
SPI Master/Slave Connection .................................. 104
UART Receiver ........................................................ 116
UART Transmitter .................................................... 115
10-bit High-Speed A/D Functional ........................... 150
16-bit Timer1 Module (Type A Timer) ........................ 66
16-bit Timer2 (Type B Timer) .................................... 71
16-bit Timer3 (Type C Timer) .................................... 71
16-bit Timer4 (Type B Timer) .................................... 76
16-bit Timer5 (Type C Timer) .................................... 76
32-bit Timer2/3 .......................................................... 70
32-bit Timer4/5 .......................................................... 75
MPLAB C18 ............................................................. 170
MPLAB C30 ............................................................. 170
Baud Rate Setting ................................................... 128
Bit Timing ................................................................. 128
Message Reception ................................................. 126
Message Transmission ............................................ 127
Modes of Operation ................................................. 125
Phase Segments ..................................................... 129
Prescaler Setting ..................................................... 129
Propagation Segment .............................................. 129
Sample Point ........................................................... 129
Synchronization ....................................................... 129
CAN1 Register Map ................................................. 130
Frame Types ........................................................... 123
Overview .................................................................. 123
Data EEPROM Block Erase ...................................... 56
Data EEPROM Block Write ....................................... 58
Data EEPROM Read ................................................. 55
Data EEPROM Word Erase ...................................... 56
Data EEPROM Word Write ....................................... 57
Erasing a Row of Program Memory .......................... 51
Initiating a Programming Sequence .......................... 52
Loading Write Latches ............................................... 52
Acceptance Filter Masks ................................. 126
Acceptance Filters ........................................... 126
Receive Buffers ............................................... 126
Receive Errors ................................................. 126
Receive Interrupts ........................................... 126
Receive Overrun .............................................. 126
Aborting ........................................................... 127
Errors ............................................................... 127
Interrupts ......................................................... 128
Sequence ........................................................ 127
Transmit Buffers .............................................. 127
Transmit Priority .............................................. 127
Disable ............................................................ 125
Error Recognition ............................................. 125
Initialization ...................................................... 125
Listen-Only ...................................................... 125
Loopback ......................................................... 125
Normal ............................................................. 125
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