DSPIC30F5015-30I/PT Microchip Technology Inc., DSPIC30F5015-30I/PT Datasheet - Page 149

• Manufacturer Part Number: DSPIC30F5015-30I/PT
• Description: DSP, 16-Bit, 66 KB Flash, 2KB RAM, 52 I/O, TQFP-64
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F5015-30I/PT

• A/d Inputs: 16-Channels, 10-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 52
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 52
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 64-pin TQFP
• Programmable Memory: 66K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 20-7:
TABLE 20-8:
RCON
OSCCON 0742
OSCTUN
PMD1
PMD2
Legend:
Note:
FOSC
FWDT
FBORPOR
FGS
Legend:
Note:
Name
File Name
SFR
u = uninitialized bit
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Addr.
u = uninitialized bit
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
0740 TRAPR IOPUWR BGST
0744
0770
0772 IC8MD
F80000
F80002
F80004
F8000A
Addr.
Bit 15
T5MD
—
—
SYSTEM INTEGRATION REGISTER MAP FOR dsPIC30F5015/5016
DEVICE CONFIGURATION REGISTER MAP
IC7MD
Bit 14
T4MD
Bits 23-16
—
—
—
—
—
COSC<2:0>
IC6MD IC5MD IC4MD IC3MD
Bit 13
T3MD
—
FWDTEN
MCLREN
Bit 15
FCKSM<1:0>
Bit 12
T2MD
—
—
—
Bit 11
T1MD QEIMD PWMMD
—
—
—
Bit 14
—
—
—
Bit 10
—
—
Bit 13
—
—
—
—
NOSC<2:0>
IC2MD
Bit 9
—
—
Bit 12
—
—
—
—
IC1MD OC8MD OC7MD
Bit 8
—
—
—
Bit 11
—
—
—
—
I2CMD
EXTR
Bit 7
POST<1:0>
—
PWMPIN
Bit 10
—
—
U2MD
SWR
Bit 6
—
FOS<2:0>
HPOL
SWDTEN
Bit 9
OC6MD
LOCK
U1MD
—
—
Bit 5
—
LPOL
Bit 8
SPI2MD SPI1MD
—
—
OC5MD OC4MD OC3MD
WDTO
Bit 4
—
BOREN
Bit 7
—
—
—
SLEEP
Bit 3
CF
Bit 6
TUN<4:0>
—
—
—
—
IDLE
Bit 2
—
—
Bit 5
FWPSA<1:0>
—
BORV<1:0>
—
LPOSCEN OSWEN Depends on Configuration bits.
OC2MD
C1MD
Bit 1
BOR
Bit 4
—
ADCMD
OC1MD
Bit 0
POR
Bit 3
—
—
Depends on type of Reset.
FPR<4:0>
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Bit 2
—
—
FWPSB<3:0>
Reset State
Bit 1
GCP
FPWRT<1:0>
GWRP
Bit 0