DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 136

IC TXRX T1/E1/J1 8PORT 256-CSBGA

DS26518GN+

Manufacturer Part Number
DS26518GN+
Description
IC TXRX T1/E1/J1 8PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheets

Specifications of DS26518GN+

Number Of Drivers/receivers
8/8
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: HDLC-256 Software Reset (H256RST). HDLC-256 Channels 1–8 logic and registers are reset with a 0-to-1
transition in this bit. The reset is released when a zero is written to this bit.
Note: HDLC-64 circuits are reset by the framer software reset.
Bit 2: LIU Software Reset (LRST). LIU Channels 1–8 logic and registers are reset with a 0-to-1 transition in this
bit. The reset is released when a zero is written to this bit.
Bit 1: BERT Software Reset (BRST). BERT Channels 1–8 logic and registers are reset with a 0-to-1 transition in
this bit. The reset is released when a zero is written to this bit.
Bit 0: Framer Software Reset (FRST). Framers 1-8 to logic and registers are reset with a 0-to-1 transition in this
bit. The reset is released when a zero is written to this bit.
0 = Normal operation.
1 = Reset HDLC-256 channels 1–8.
0 = Normal operation.
1 = Reset LIU channels 1–8.
0 = Normal operation.
1 = Reset BERT channels 1–8.
0 = Normal operation.
1 = Reset framers 1–8.
7
0
GSRR1
Global Software Reset Register 1
00F6h
6
0
5
0
136 of 312
4
0
H256RST
3
0
LRST
2
0
BRST
1
0
FRST
0
0

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