DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 172
DS26518GN+
Manufacturer Part Number
DS26518GN+
Description
IC TXRX T1/E1/J1 8PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Specifications of DS26518GN+
Number Of Drivers/receivers
8/8
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 172 of 312
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Receive Channel Data Format (RDATFMT)
Bit 6: Receive Gapped Clock Enable (RGCLKEN)
1 = Enable gapped bit clock output on RCHCLKn.
Note: RGPCKEN and RDATFMT are not associated with the elastic store and will be explained in the fractional
support section.
Bit 4: Receive Slip Zone Select (RSZS). This bit determines the minimum distance allowed between the elastic
store read and write pointers before forcing a controlled slip. This bit is only applies during T1 to E1 or E1 to T1
conversion applications.
Bit 3: Receive Elastic Store Align (RESALGN). Setting this bit from a zero to a one will force the receive elastic
store’s write/read pointers to a minimum separation of half a frame. No action will be taken if the pointer separation
is already greater or equal to half a frame. If pointer separation is less than half a frame, the command will be
executed and the data will be disrupted. Should be toggled after RSYSCLKn has been applied and is stable. Must
be cleared and set again for a subsequent align.
Bit 2: Receive Elastic Store Reset (RESR). Setting this bit from a zero to a one will force the read pointer into the
same frame that the write pointer is exiting, minimizing the delay through the elastic store. If this command should
place the pointers within the slip zone (see bit 4), then an immediate slip will occur and the pointers will move back
to opposite frames. Should be toggled after RSYSCLKn has been applied and is stable. Do not leave this bit set
HIGH.
Bit 1: Receive Elastic Store Minimum Delay Mode (RESMDM)
Bit 0: Receive Elastic Store Enable (RESE)
0 = 64kbps (data contained in all 8 bits).
1 = 56kbps (data contained in 7 out of the 8 bits).
0 = RCHCLKn functions normally.
0 = Force a slip at 9 bytes or less of separation (used for clustered blank channels).
1 = Force a slip at 2 bytes or less of separation (used for distributed blank channels and minimum delay
mode).
0 = Elastic stores operate at full two-frame depth.
1 = Elastic stores operate at 32-bit depth.
0 = Elastic store is bypassed.
1 = Elastic store is enabled.
RDATFMT
7
0
RGCLKEN
RESCR
Receive Elastic Store Control Register
085h + (200h x (n - 1)) : where n = 1 to 8
6
0
—
5
0
172 of 312
RSZS
0
4
RESALGN
3
0
RESR
2
0
RESMDM
1
0
RESE
0
0
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