DS26518GN+ Maxim Integrated Products, DS26518GN+ Datasheet - Page 256
DS26518GN+
Manufacturer Part Number
DS26518GN+
Description
IC TXRX T1/E1/J1 8PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Specifications of DS26518GN+
Number Of Drivers/receivers
8/8
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: All latched bits in this register can create interrupts.
Bit 6: BERT Bit Error Detected Event (BBED). A latched bit that is set when a bit error is detected. The receive
BERT must be in synchronization for it to detect bit errors.
Bit 5: Real-Time BERT All Zeros or All Ones (RBA01). ORed real-time status of all-zeros detection and all-ones
detection.
Bit 4: Real-Time Sync (RSYNC). Real-time sync status. A zero indicates not synchronized; a one indicates
synchronization state.
Bit 3: BERT Receive All-Ones Condition (BRA1). A latched bit that is set when 32 consecutive ones are
received.
Bit 2: BERT Receive All-Zeros Condition (BRA0). A latched bit that is set when 32 consecutive zeros are
received.
Bit 1: BERT Receive Loss of Synchronization Condition (BRLOS). A latched bit that is set whenever the
receive BERT begins searching for a pattern.
Bit 0: BERT in Synchronization Condition (BSYNC). A latched bit that is set when the incoming pattern matches
for 32 consecutive bit positions.
—
7
0
BSR
BERT Status Register
110Eh + (10h x (n - 1)) : where n = 1 to 8
BBED
6
0
RBA01
5
0
RSYNC
256 of 312
0
4
BRA1
3
0
BRA0
2
0
BRLOS
1
0
BSYNC
0
0
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