PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 150

• Manufacturer Part Number: PIC16F913-I/SP
• Description: 28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F913-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 25
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F917/916/914/913
12.1.7
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine sample time, see Section 19.0 “Electrical
Specifications”. After this sample time has elapsed, the
A/D conversion can be started.
These steps should be followed for an A/D conversion:
1.
2.
3.
4.
5.
6.
7.
DS41250E-page 148
Configure the A/D module:
• Configure analog/digital I/O (ANSEL)
• Configure voltage reference (ADCON0)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON1)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear ADIF bit (PIR1<6>)
• Set ADIE bit (PIE1<6>)
• Set PEIE and GIE bits (INTCON<7:6>)
Wait the required acquisition time.
Start conversion:
• Set GO/DONE bit (ADCON0<1>)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
• Waiting for the A/D interrupt
Read A/D Result register pair
(ADRESH:ADRESL); clear bit ADIF if required.
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T
required before the next acquisition starts.
(with interrupts disabled); OR
CONFIGURING THE A/D
AD
. A minimum wait of 2 T
AD
is
Preliminary
EXAMPLE 12-1:
;This code block configures the A/D
;for polling, Vdd reference, R/C clock
;and RA0 input.
;
;Conversion start and wait for complete
;polling code included.
;
BSF
MOVLW B’01110000’
MOVWF ADCON1
BSF
BSF
BCF
MOVLW B’10000001’
MOVWF ADCON0
CALL
BSF
BTFSC ADCON0,GO
GOTO
MOVF
MOVWF RESULTHI
BSF
MOVF
MOVWF RESULTLO
STATUS,RP0
TRISA,0
ANSEL,0
STATUS,RP0
SampleTime
ADCON0,GO
$-1
ADRESH,W
STATUS,RP0
ADRESL,W
A/D CONVERSION
© 2005 Microchip Technology Inc.
;Bank 1
;A/D RC clock
;Set RA0 to input
;Set RA0 to analog
;Bank 0
;Right, Vdd Vref, AN0
;Wait min sample time
;Start conversion
;Is conversion done?
;No, test again
;Read upper 2 bits
;Bank 1
;Read lower 8 bits