PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 201

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PIC16F913-I/SP

Manufacturer Part Number
PIC16F913-I/SP
Description
28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F913-I/SP

A/d Inputs
5-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F913-I/SP
Manufacturer:
TI
Quantity:
212
16.6
For PIC16F917/916/914/913, the WDT has been mod-
ified from previous PIC16F devices. The new WDT is
code and functionally compatible with previous PIC16F
WDT modules and adds a 16-bit prescaler to the WDT.
This allows the user to have a scaled value for the WDT
and TMR0 at the same time. In addition, the WDT
time-out value can be extended to 268 seconds. WDT
is cleared under certain conditions described in
Table 16-7.
16.6.1
The WDT derives its time base from the 31 kHz
LFINTOSC. The LTS bit does not reflect that the
LFINTOSC is enabled.
The value of WDTCON is ‘---0 1000’ on all Resets.
This gives a nominal time base of 16 ms, which is
compatible with the time base generated with previous
PIC16F microcontroller versions.
FIGURE 16-9:
TABLE 16-7:
© 2005 Microchip Technology Inc.
WDTE = 0
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTOSC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
LFINTOSC Clock
Note:
31 kHz
Watchdog Timer (WDT)
Note 1: This is the shared Timer0/WDT prescaler. See Section 5.4 “Prescaler” for more information.
WDT OSCILLATOR
When the Oscillator Start-up Timer (OST)
is invoked, the WDT is held in Reset,
because the WDT Ripple Counter is used
by the OST to perform the oscillator delay
count. When the OST count has expired,
the WDT will begin counting (if enabled).
WDT STATUS
WATCHDOG TIMER BLOCK DIAGRAM
WDTE from Configuration Word register
SWDTEN from WDTCON
Conditions
16-bit WDT Prescaler
WDTPS<3:0>
From TMR0 Clock Source
Preliminary
PIC16F917/916/914/913
A new prescaler has been added to the path between
the INTOSC and the multiplexers used to select the
path for the WDT. This prescaler is 16 bits and can be
programmed to divide the INTOSC by 32 to 65536,
giving the WDT a nominal range of 1 ms to 268s.
16.6.2
The WDTE bit is located in the Configuration Word
register. When set, the WDT runs continuously.
When the WDTE bit in the Configuration Word register
is set, the SWDTEN bit (WDTCON<0>) has no effect.
If WDTE is clear, then the SWDTEN bit can be used to
enable and disable the WDT. Setting the bit will enable
it and clearing the bit will disable it.
The PSA and PS<2:0> bits (OPTION_REG) have the
same function as in previous versions of the PIC16F
family of microcontrollers. See Section 5.0 “Timer0
Module” for more information.
0
1
WDT CONTROL
PSA
Cleared until the end of OST
WDT Time-out
0
Prescaler
Cleared
1
8
WDT
DS41250E-page 199
(1)
PSA
PS<2:0>
To TMR0

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