PIC16F913-I/SP Microchip Technology Inc., PIC16F913-I/SP Datasheet - Page 67

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PIC16F913-I/SP

Manufacturer Part Number
PIC16F913-I/SP
Description
28 PIN, 7 KB FLASH, 352 RAM, 25 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F913-I/SP

A/d Inputs
5-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F913-I/SP
Manufacturer:
TI
Quantity:
212
3.6
PORTE is a 4-bit port with Schmitt Trigger input buffers.
RE<2:0> are individually configured as inputs or out-
puts. RE3 is only available as an input if MCLRE is ‘0’
in Configuration Word (Register 16-1).
RE<2:0> are only available on the PIC16F914 and
PIC16F917.
REGISTER 3-11:
REGISTER 3-12:
© 2005 Microchip Technology Inc.
Note:
PORTE and TRISE Registers
bit 7-4
bit 3-0
bit 7-4
bit 3
bit 2-0
Analog lines that carry LCD signals
(i.e., SEGx, where x are segment identifi-
ers) are shown as direct connections to
the device pins. The signals are outputs
from the LCD module and may be
tri-stated, depending on the configuration
of the LCD module.
PORTE – PORTE REGISTER (ADDRESS: 09h)
TRISE – PORTE TRI-STATE REGISTER (ADDRESS: 89h)
bit 7
Unimplemented: Read as ‘0’
RE<3:0>: PORTE I/O Pin bits
1 = Port pin is >V
0 = Port pin is <V
Legend:
R = Readable bit
- n = Value at POR
bit 7
Unimplemented: Read as ‘0’
TRISE3: Data Direction bit. RE3 is always an input, so this bit always reads as a ‘1’
TRISE<2:0>: Data Direction bits
Legend:
R = Readable bit
- n = Value at POR
U-0
U-0
U-0
U-0
IH
IL
U-0
U-0
Preliminary
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PIC16F917/916/914/913
U-0
U-0
EXAMPLE 3-5:
BCF
BCF
CLRF
BSF
BCF
MOVLW
MOVWF
CLRF
BCF
BCF
TRISE3
STATUS,RP0
STATUS,RP1
PORTE
STATUS,RP0
STATUS,RP1
0Fh
TRISE
ANSEL
STATUS,RP0
STATUS,RP1
R/W-x
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RE3
R-1
TRISE2
R/W-x
R/W-1
RE2
INITIALIZING PORTE
;Bank 0
;
;Init PORTE
;Bank 1
;
;Set RE<3:0> as inputs
;
;Make RE<2:0> as I/O’s
;Bank 0
;
x = Bit is unknown
x = Bit is unknown
TRISE1
R/W-x
R/W-1
RE1
DS41250E-page 65
TRISE0
R/W-x
R/W-1
RE0
bit 0
bit 0

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