WM8310GEB/V Wolfson Microelectronics, WM8310GEB/V Datasheet - Page 129

• Manufacturer Part Number: WM8310GEB/V
• Description: POWER MANAGEMENT SUBSYSTEM, 169BGA
• Manufacturer: Wolfson Microelectronics

Specifications of WM8310GEB/V

• Supply Voltage: 7V
• No. Of Step-down Dc - Dc Converters: 4
• No. Of Ldo Regulators: 11
• Digital Ic Case Style: BGA
• No. Of Pins: 169
• No. Of Regulated Outputs: 13
• Operating Temperature Range: -40°C To
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Pre-Production
21 GENERAL PURPOSE INPUTS / OUTPUTS (GPIO)
21.1 GENERAL DESCRIPTION
21.2 GPIO FUNCTIONS
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The WM8310 has 12 general-purpose input/output (GPIO) pins, GPIO1 - GPIO12. These can be
configured as inputs or outputs, active high or active low, with optional on-chip pull-up or pull-down
resistors. GPIO outputs can either be CMOS driven or Open Drain configuration. Each GPIO pin can
be tri-stated and can also be used to trigger Interrupts.
The function of each GPIO pin is selected individually. Different voltage power domains are
selectable on a pin by pin basis. Input de-bounce is automatically implemented on selected GPIO
functions.
The list of GPIO functions supported by the WM8310 is contained in Table 73 (for input functions)
and Table 74 (for output functions). The input functions are selected when the respective GPn_DIR
register bit is 1. The output functions are selected when the respective GPn_DIR register bit is 0.
The selected function for each GPIO pin is selected by writing to the respective GPn_FN register
bits. All functions are available on all GPIO pins. The polarity of each input or output GPIO function
can be selected using the applicable GPn_POL register bit.
The available power domains for each pin are specific to different GPIOs.
The de-bounce time for the GPIO input functions is determined by the GPn_FN field. Some of the
input functions allow a choice of de-bounce times, as detailed in Table 73.
The register controls for configuring the GPIO pins are defined in Section 21.3.
GPn_FN
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
GPIO
ON/OFF
Request
SLEEP/WAKE
Request
SLEEP
Request
ON Request
Watchdog
Reset
Hardware DVS
control 1
Hardware DVS
control 2
GPIO INPUT
FUNCTION
GPIO input. Logic level is read from the
GPn_LVL register bits. See Section 21.3.
Control input for requesting an ON/OFF state
transition. See Section 11.3.
Under default polarity (GPn_POL=1), a rising
edge requests the ON state and a falling edge
requests the OFF state.
Control input for requesting a SLEEP/WAKE
state transition. See Section 11.3.
Under default polarity (GPn_POL=1), a rising
edge requests the SLEEP state and a falling
edge requests the WAKE transition to the ON
state.
Control input for requesting a SLEEP state
transition. See Section 11.3.
Under default polarity (GPn_POL=1), a rising
edge requests the SLEEP state and a falling
edge has no effect.
Control input for requesting an ON state
transition. See Section 11.3.
Under default polarity (GPn_POL=1), a rising
edge requests the ON state and a falling edge
has no effect.
Control input for resetting the Watchdog Timer.
See Section 25.
Control input for selecting the DVS output
voltage in one or more DC Converters.
See Section 15.6.
Control input for selecting the DVS output
voltage in one or more DC Converters.
See Section 15.6.
DESCRIPTION
PP, December 2009, Rev 3.0
32ms to 64ms
DE-BOUNCE
32μs to 64μs
32μs to 64μs
32μs to 64μs
32μs to 64μs
32μs to 64μs
4ms to 8ms
32ms 64ms
WM8310
TIME
None
None
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